DJLXT971ALE.A4 Cortina Systems Inc, DJLXT971ALE.A4 Datasheet - Page 43

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DJLXT971ALE.A4

Manufacturer Part Number
DJLXT971ALE.A4
Description
Manufacturer
Cortina Systems Inc
Datasheet

Specifications of DJLXT971ALE.A4

Lead Free Status / RoHS Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DJLXT971ALE.A4
Manufacturer:
AMD
Quantity:
104
Part Number:
DJLXT971ALE.A4
Manufacturer:
Intel
Quantity:
10 000
LXT971A PHY
Datasheet
249414, Revision 5.2
13 September 2007
Figure 15
Note:
Figure 16
Cortina Systems
100BASE-TX Data Path
In 100BASE-FX mode, the LXT971A PHY transmits and receives NRZI signals across the
LVPECL interface. An external 100BASE-FX PHY module is required to complete the
fiber connection. To enable 100BASE-FX operation, auto-negotiation must be disabled
and fiber mode selected.
Figure 16
100BASE-TX Reception with No Errors
As shown in
asserts RX_ER.
®
Standard Data Flow
Scrambler Bypass Data Flow
D0
D1
D2
D3
S0
S1
S2
S3
S4
RXD<3:0>
LXT971A Single-Port 10/100 Mbps PHY Transceiver
RX_CLK
RX_DV
RX_ER
Parallel
Parallel
Parallel
Parallel
Serial
Serial
Serial
Serial
shows normal reception with no errors.
to
to
to
to
Figure
preamble SFD SFD DA
D0 D1 D2 D3
17, when the LXT971A PHY receives invalid symbols from the line, it
DA
4B/5B
DA
DA
S0 S1 S2 S3 S4
S0 S1 S2 S3 S4
CRC
CRC
Scramble
Scramble
CRC
De-
5.7 100 Mbps Operation
CRC
MLT3
MLT3
pattern: 0, +1, 0, -1, 0, +1...
pattern: 0, +1, 0, -1, 0, +1...
All transitions must follow
All transitions must follow
0
0
B3468-01
No Transition = 0.
No Transition = 0.
Transition = 1.
Transition = 1.
+1
+1
B3467-01
0
0
Page 43
-1
-1
0
0

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