DS2152LN Maxim Integrated Products, DS2152LN Datasheet - Page 68

• Manufacturer Part Number: DS2152LN
• Description: Network Controller & Processor ICs
• Manufacturer: Maxim Integrated Products

Specifications of DS2152LN

• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 2.048 Mbps
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Supply Current (max): 75 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: LQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

RFDLM1: RECEIVE FDL MATCH REGISTER 1 (Address = 29 Hex)
RFDLM2: RECEIVE FDL MATCH REGISTER 2 (Address = 2A Hex)
When the byte in the Receive FDL Register matches either of the two Receive FDL Match Registers
(RFDLM1/RFDLM2), RSR2.2 will be set to 1 and the INT will go active if enabled via IMR2.2.
12.2.2
The transmit section will shift out into the T1 data stream either the FDL (in the ESF framing mode) or
the Fs bits (in the D4 framing mode) contained in the Transmit FDL register (TFDL). When a new value
is written to the TFDL, it will be multiplexed serially (LSB first) into the proper position in the outgoing
T1 data stream. After the full 8 bits have been shifted out, the DS2152 will signal the host microcontroller
that the buffer is empty and that more data is needed by setting the SR2.3 bit to 1. The INT will also
toggle low if enabled via IMR2.3. The user has 2ms to update the TFDL with a new value. If the TFDL is
not updated, the old value in the TFDL will be transmitted once again.
The DS2152 also contains a 0 stuffer which is controlled via the CCR2.4 bit. In both ANSI T1.403 and
TR54016, communications on the FDL follows a subset of a LAPD protocol. The LAPD protocol states
that no more than five 1s should be transmitted in a row so that the data does not resemble an opening or
closing flag (01111110) or an abort signal (11111111). If enabled via CCR2.4, the DS2152 will
automatically look for five 1s in a row. If it finds such a pattern, it will automatically insert a 0 after the
five 1s. The CCR2.0 bit should always be set to a 1 when the DS2152 is inserting the FDL. More on how
to use the DS2152 in FDL applications is covered in a separate application note.
TFDL: TRANSMIT FDL REGISTER (Address = 7E Hex)
(Also used to insert Fs framing pattern in D4 framing mode; see Section 12.3)
The Transmit FDL Register (TFDL) contains the Facility Data Link (FDL) information that is to be
inserted on a byte basis into the outgoing T1 data stream. The LSB is transmitted first.
(MSB)
(MSB)
RFDL7
TFDL7
SYMBOL
SYMBOL
RFDL7
RFDL0
TFDL7
TFDL0
Transmit Section
RFDL6
TFDL6
POSITION
POSITION
RFDL.7
RFDL.0
TFDL.7
TFDL.0
RFDL5
TFDL5
NAME AND DESCRIPTION
NAME AND DESCRIPTION
MSB of the FDL Match Code
LSB of the FDL Match Code
MSB of the FDL code to be transmitted.
LSB of the FDL code to be transmitted.
RFDL4
TFDL4
68 of 97
RFDL3
TFDL3
RFDL2
TFDL2
RFDL1
TFDL1
RFDL0
TFDL0
(LSB)
(LSB)