DS2152LN Maxim Integrated Products, DS2152LN Datasheet - Page 18

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DS2152LN

Manufacturer Part Number
DS2152LN
Description
Network Controller & Processor ICs
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2152LN

Product
Framer
Number Of Transceivers
1
Data Rate
2.048 Mbps
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Supply Current (max)
75 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
LQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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3 PARALLEL PORT
The DS2152 is controlled via either a nonmultiplexed (MUX = 0) or a multiplexed (MUX = 1) bus by an
external microcontroller or microprocessor. The DS2152 can operate with either Intel or Motorola bus
timing configurations. If the BTS pin is tied low, Intel timing will be selected; if tied high, Motorola
timing will be selected. All Motorola bus signals are listed in parentheses. See the timing diagrams in the
AC Electrical Characteristics in Section
4 CONTROL, ID, AND TEST REGISTERS
The operation of the DS2152 is configured via a set of 11 control registers. Typically, the control
registers are only accessed when the system is first powered up. Once the DS2152 has been initialized,
the control registers will only need to be accessed when there is a change in the system configuration.
There are two Receive Control Register (RCR1 and RCR2), two Transmit Control Registers (TCR1 and
TCR2), and seven Common Control Registers (CCR1 to CCR7). Each of the 11 registers is described in
this section.
There is a device Identification Register (IDR) at address 0Fh. The MSB of this read-only register is fixed
to a 0 indicating that the DS2152 is present. The E1 pin-for-pin compatible version of the DS2152 is the
DS2154, which also has an ID register at address 0Fh. The user can read the MSB to determine which
chip is present since in the DS2152 the MSB will be set to 0 and in the DS2154 it will be set to 1. The
lower 4 bits of the IDR are used to display the die revision of the chip.
IDR: DEVICE IDENTIFICATION REGISTER (Address = 0F Hex)
The two Test Registers at addresses 09 and 7D hex are used by the factory in testing the DS2152. On
power-up, the Test Registers should be set to 00 hex for the DS2152 to operate properly.
(MSB)
T1E1
SYMBOL
T1E1
ID3
ID2
ID1
ID0
0
POSITION
IDR.7
IDR.3
IDR.1
IDR.2
IDR.0
0
NAME AND DESCRIPTION
T1 or E1 Chip Determination Bit.
0 = T1 chip
1 = E1 chip
Chip Revision Bit 3. MSB of a decimal code that represents the
chip revision.
Chip Revision Bit 2.
Chip Revision Bit 1.
Chip Revision Bit 0. LSB of a decimal code that represents the
chip revision.
18
for more details.
0
18 of 97
ID3
ID2
ID1
(LSB)
ID0

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