LAN9312-NZW SMSC, LAN9312-NZW Datasheet - Page 171

• Manufacturer Part Number: LAN9312-NZW
• Description: Ethernet ICs Hi Per 2 Port 10/100 Ethernet Switch
• Manufacturer: SMSC
• Type: Two Port Managed Ethernet Switchr

Specifications of LAN9312-NZW

• Ethernet Connection Type: 10 Base-T, 100 Base-TX
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Product: Ethernet Switches
• Number Of Transceivers: 1
• Standard Supported: 802.3, 802.3u
• Data Rate: 10 Mbps, 100 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 0 V
• Supply Current (max): 186 mA, 295 mA
• Maximum Operating Temperature: + 70 C
• Package / Case: TQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

High Performance Two Port 10/100 Managed Ethernet Switch with 32-Bit Non-PCI CPU Interface
Datasheet
SMSC LAN9312
ADDRESS
200h-2DCh
2E0h-3FFh
OFFSET
1CCh
1DCh
1ACh
1BCh
1ECh
1FCh
1A0h
1A4h
1A8h
1B0h
1B4h
1B8h
1C0h
1C4h
1C8h
1D0h
1D4h
1D8h
1E0h
1E4h
1E8h
1F0h
1F4h
1F8h
VPHY_SPECIAL_CONTROL_STATUS
VPHY_AN_LP_BASE_ABILITY
SWITCH_CSR_DIRECT_DATA
Table 14.1 System Control and Status Registers (continued)
SWITCH_MAC_ADDRH
SWITCH_MAC_ADDRL
VPHY_BASIC_STATUS
SWITCH_CSR_DATA
SWITCH_CSR_CMD
VPHY_BASIC_CTRL
GPIO_INT_STS_EN
MANUAL_FC_MII
GPIO_DATA_DIR
VPHY_AN_ADV
MANUAL_FC_1
MANUAL_FC_2
VPHY_AN_EXP
VPHY_ID_MSB
VPHY_ID_LSB
RESET_CTL
RESERVED
RESERVED
RESERVED
SYMBOL
GPIO_CFG
E2P_DATA
E2P_CMD
LED_CFG
DATASHEET
171
Port 1 Manual Flow Control Register,
Port 2 Manual Flow Control Register,
Port 0 Flow Control Register,
Switch Fabric CSR Interface Data Register,
Section 14.2.6.4
Switch Fabric CSR Interface Command Register,
Section 14.2.6.5
EEPROM Command Register,
EEPROM Data Register,
LED Configuration Register,
Virtual PHY Basic Control Register,
Virtual PHY Basic Status Register,
Virtual PHY Identification MSB Register,
Virtual PHY Identification LSB Register,
Virtual PHY Auto-Negotiation Advertisement Register,
Section 14.2.8.5
Virtual PHY Auto-Negotiation Link Partner Base Page
Ability Register,
Virtual PHY Auto-Negotiation Expansion Register,
Section 14.2.8.7
Virtual PHY Special Control/Status Register,
Section 14.2.8.8
General Purpose I/O Configuration Register,
Section 14.2.3.1
General Purpose I/O Data & Direction Register,
Section 14.2.3.2
General Purpose I/O Interrupt Status and Enable Register,
Section 14.2.3.3
Reserved for Future Use
Switch MAC Address High Register,
Switch MAC Address Low Register,
Reset Control Register,
Reserved for Future Use
Switch Engine CSR Interface Direct Data Register,
Section 14.2.6.8
Reserved for Future Use
Section 14.2.8.6
REGISTER NAME
Section 14.2.9.8
Section 14.2.4.2
Section 14.2.3.4
Section 14.2.6.3
Section 14.2.4.1
Section 14.2.8.2
Section 14.2.8.1
Section 14.2.6.7
Revision 1.7 (06-29-10)
Section 14.2.6.6
Section 14.2.6.1
Section 14.2.6.2
Section 14.2.8.4
Section 14.2.8.3