LAN9303I-ABZJ SMSC, LAN9303I-ABZJ Datasheet - Page 351

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LAN9303I-ABZJ

Manufacturer Part Number
LAN9303I-ABZJ
Description
Ethernet ICs 3 Port 0/100 Ether Switch MII/RMII/Turb
Manufacturer
SMSC
Datasheet

Specifications of LAN9303I-ABZJ

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
14.5.2
Configuration
SYMBOL
Output Drive
t
t
t
t
odad
rstia
Strap Pins
csh
css
nRST
Reset and Configuration Strap Timing
This diagram illustrates the nRST pin timing requirements and its relation to the configuration strap
pins and output drive. Assertion of nRST is not a requirement. However, if used, it must be asserted
for the minimum period specified. Please refer to
information.
Note: Device configuration straps are latched as a result of nRST assertion. Refer to
nRST input assertion time
Configuration strap pins setup to nRST deassertion
Configuration strap pins hold after nRST deassertion
Output drive after deassertion
"Configuration Straps," on page 45
Table 14.7 nRST Reset Pin Timing Values
DESCRIPTION
Figure 14.2 nRST Reset Pin Timing
t
rstia
t
DATASHEET
css
351
for details.
t
csh
t
odad
Section 4.2, "Resets," on page 42
MIN
200
200
10
30
TYP
Revision 1.4 (07-07-10)
MAX
Section 4.2.4,
for additional
UNITS
μ S
nS
nS
nS

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