LAN9303I-ABZJ SMSC, LAN9303I-ABZJ Datasheet - Page 19

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LAN9303I-ABZJ

Manufacturer Part Number
LAN9303I-ABZJ
Description
Ethernet ICs 3 Port 0/100 Ether Switch MII/RMII/Turb
Manufacturer
SMSC
Datasheet

Specifications of LAN9303I-ABZJ

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Datasheet
SMSC LAN9303/LAN9303i
2.2.9
2.3
2.3.1
2.3.2
runs upon a pin reset (nRST), power-on reset (POR), digital reset, or upon the issuance of a EEPROM
RELOAD command.
GPIO/LED Controller
Six configurable general-purpose input/output pins are provided which are controlled via this module.
These pins can be individually configured via the GPIO/LED CSRs to function as inputs, push-pull
outputs, or open drain outputs and each is capable of interrupt generation with configurable polarity.
The GPIO pins can be alternatively configured as LED outputs to drive Ethernet status LEDs for
external indication of various attributes of the switch ports.
The LAN9303/LAN9303i is designed to integrate into various embedded environments. To accomplish
compatibility with a wide range of applications, the LAN9303/LAN9303i ports can operate in the
following modes:
The mode of the device is determined by the P0_MODE[2:0] (Port 0) pin straps.
The device can also be placed into the following management modes:
The management mode is determined by the MNGT1_LED4P and MNGT0_LED3P pin straps. These
modes are detailed in the following sections.
Port 0 mode and management type supported by the device. Refer to
on page 121
Internal PHY Mode
Internal PHY mode (Port 1 and Port 2) utilizes the internal PHY for the network connection. The Switch
Engine MAC’s MII port is connected internally to the internal PHY in this mode. Internal PHY mode
can operate at 10Mbps or 100Mbps.
When an EEPROM is connected, the EEPROM loader can be used to load the initial device
configuration from the external EEPROM via the I
can use the I
MAC Mode
MAC mode utilizes an external PHY, which is connected to the Port 0 MII pins, to provide an Ethernet
network connection. In this mode, the port acts as a MAC, providing a communication path between
the Switch Fabric and the external PHY. MAC mode can operate at 10, 100, or 200Mbps (Turbo mode).
In MAC mode, the device may be SMI managed or I
"Management
When an EEPROM is connected, the EEPROM loader can be used to load the initial device
configuration from the external EEPROM via the I
can use the I
Modes of Operation
Port 0 - Independently configured for MII MAC, MII PHY, RMII PHY modes
Port 1 - Internal PHY mode
Port 2 - Internal PHY mode
SMI managed
I
2
C managed
for additional information on the usage of MII signals in each supported mode.
2
2
C interface to read or write the EEPROM.
C interface to read or write the EEPROM.
Modes".
DATASHEET
19
Figure 2.4
2
2
C interface. Once operational, if managed, the CPU
C interface. Once operational, if managed, the CPU
displays a typical system configuration for each
2
C managed as detailed in
Chapter 9, "MII Data Interface,"
Revision 1.4 (07-07-10)
Section 2.3.4,

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