LAN9303I-ABZJ SMSC, LAN9303I-ABZJ Datasheet - Page 294

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LAN9303I-ABZJ

Manufacturer Part Number
LAN9303I-ABZJ
Description
Ethernet ICs 3 Port 0/100 Ether Switch MII/RMII/Turb
Manufacturer
SMSC
Datasheet

Specifications of LAN9303I-ABZJ

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Revision 1.4 (07-07-10)
13.4.3.20
31:16
15:14
13:12
11:10
BITS
9:8
7:6
5:4
3:2
1:0
RESERVED
Priority 7 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 7.
Priority 6 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 6.
Priority 5 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 5.
Priority 4 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 4.
Priority 3 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 3.
Priority 2 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 2.
Priority 1 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 1.
Priority 0 traffic Class
These bits specify the egress queue that is used for packets with a priority
of 0.
Switch Engine Priority to Queue Register (SWE_PRI_TO_QUE)
This register specifies the Traffic Class table that maps the packet priority into the egress queues.
Register #:
1845h
DESCRIPTION
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
DATASHEET
294
Size:
32 bits
TYPE
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
SMSC LAN9303/LAN9303i
RO
DEFAULT
11b
11b
10b
10b
01b
00b
00b
01b
Datasheet
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