DS21455 Maxim Integrated Products, DS21455 Datasheet - Page 169

no-image

DS21455

Manufacturer Part Number
DS21455
Description
Network Controller & Processor ICs Quad E1-T1-J1 Single -Chip Transceiver (S
Manufacturer
Maxim Integrated Products
Datasheets

Specifications of DS21455

Product
Framer
Number Of Transceivers
4
Data Rate
64 Kbps
Supply Voltage (max)
3.465 V
Supply Voltage (min)
3.135 V
Supply Current (max)
328 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Package / Case
BGA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DS21455
Manufacturer:
DS
Quantity:
29
Part Number:
DS21455
Manufacturer:
MIRA
Quantity:
83
Part Number:
DS21455
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS21455
Manufacturer:
MAXIM/美信
Quantity:
20 000
Part Number:
DS21455+
Manufacturer:
Maxim Integrated Products
Quantity:
135
Part Number:
DS21455+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS21455N
Manufacturer:
Maxim Integrated
Quantity:
10 000
Part Number:
DS21455N+
Manufacturer:
Maxim Integrated Products
Quantity:
135
Part Number:
DS21455N+
Manufacturer:
Maxim Integrated
Quantity:
10 000
Register Name:
Register Description:
Register Address:
Bit #
Name
Default
Bits 0 to 1/Receive Termination Select (RT0 to RT1).
Bits 2 to 3/Transmit Termination Select (TT0 to TT1).
Bits 4 and 5/MCLK Prescaler for T1 Mode.
Bits 4 and 5/MCLK Prescaler for E1 Mode.
Bit 6/CMI Invert (CMII).
Bit 7/CMI Enable (CMIE).
RT1
MCLK
MCLK
TT1
(MHz)
(MHz)
12.352
16.384
16.384
1.544
3.088
6.176
2.048
4.096
8.192
2.048
4.096
8.192
0
0
1
1
0
0
1
1
0 = CMI normal at TTIP and RTIP
1 = invert CMI signal at TTIP and RTIP
0 = disable CMI mode
1 = enable CMI mode
RT0
TT0
CMIE
0
1
0
1
0
1
0
1
7
0
MPS1
MPS1
0
0
1
1
0
0
1
1
0
0
1
1
Internal Receive-Side Termination Disabled
Internal Receive-Side 75Ω Enabled
Internal Receive-Side 100Ω Enabled
Internal Receive-Side 120Ω Enabled
Internal Transmit-Side Termination Disabled
Internal Transmit-Side 75Ω Enabled
Internal Transmit-Side 100Ω Enabled
Internal Transmit-Side 120Ω Enabled
INTERNAL RECEIVE TERMINATION
TERMINATION CONFIGURATION
CMII
LIC4
Line Interface Control 4
7Bh
6
0
MPS0
MPS0
INTERNAL TRANSMIT
0
1
0
1
0
1
0
1
0
1
0
1
CONFIGURATION
MPS1
5
0
(LIC2.3)
(LIC2.3)
JAMUX
JAMUX
0
0
0
0
1
1
1
1
0
0
0
0
MPS0
4
0
169 of 270
TT1
3
0
TT0
2
0
RT1
1
0
RT0
0
0

Related parts for DS21455