CYIL1SE3000AA-GZDC Cypress Semiconductor Corp, CYIL1SE3000AA-GZDC Datasheet - Page 5

• Manufacturer Part Number: CYIL1SE3000AA-GZDC
• Description: IC IMAGE SENSOR 3MP 369-PGA
• Manufacturer: Cypress Semiconductor Corp

Specifications of CYIL1SE3000AA-GZDC

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 5. Power Dissipation
Power supply specifications according to
Table 6. AC Electrical Characteristics
The following specifications apply for VDD = 2.5 V
Combining Power Supplies
Every module in the image sensor has its own power supply and
ground. The grounds can be combined externally, but not all
power supply inputs may be combined. Some power supplies
must be isolated to reduce electrical crosstalk and improve
shielding, dynamic range, and output swing. Internal to the
image sensor, the ground lines of each module are kept separate
to improve shielding and electrical crosstalk between them.
The LUPA 3000 contains circuitry to protect the inputs against
damage due to high static voltages or electric fields. However,
take normal precautions to avoid voltages higher than the
maximum rated voltages in this high impedance circuit. Unused
inputs must always be tied to an appropriate logic level, for
example, V
ground through a 100 nF capacitor.
The recommended combinations of supplies are:
■
■
■
Table 7. Biasing ResistorsPrecharge_Bias_1
Document Number: 001-44335 Rev. *C
Power
F
fps
Current_Ref_1
Current_Ref_2
Precharge_Bias_1
Precharge_Bias_2
CLK
Analog group of +2.5 V supply: V
V
Digital Group of +2.5 V supply: V
The V
have sinking and sourcing capability.
ANA
Symbol
Symbol
Signal
MEM_L
DD
and V
or GND. All cap_xxx pins must be connected to
Average power dissipation
Input clock frequency
Frame rate
PRECHARGE
Connect with 20 kΩ (1% prec.) to V
Connect with 50 kΩ (1% prec.) to GND
Connect with 90 kΩ (1% prec.) to V
100 nF.
Leave floating
Parameter
Parameter
[4]
supplies should be designed to
DD
RES
, V
, V
D_HS
[4]
Table
RES_DS
, V
4.
PRELIMINARY
LVDS
, V
lux = 0, clock = 50 MHz
Comment
fps = 485
Maximum clock speed
ADC
, V
pix
AA
PIX
,
. Decouple to GND
. Decouple to Vpix with
ADC
. No decoupling
Condition
Biasing
The sensor requires three biasing resistors. Refer to
more more information.
For low frame rates (< 2000 fps), the PRECHARGE_BIAS_1
pins are connected directly with the VPRECHARGE pins. The
DC level on the PRECHARGE_BIAS_1 pins acts as a power
supply and must be decoupled. For higher frame rates, the duty
cycle on VPRECHARGE is too high and the voltage drops. This
causes the black level to shift compared to the low frame rate
case.
PRECHARGE_BIAS_1 is buffered on PCB and the buffered
voltage is taken for VPRECHARGE. A second possibility is to
make the biasing resistor larger until the correct DC level is
reached.
PRECHARGE_BIAS_2 must be left floating because it is
intended for testing purposes.
Condition
In
AA
higher
Column amplifiers
ADCs
Pixel Array
Related Module
frame
Min
0.8
rates,
CYIL1SN3000AA
Typ
Typ
1.1
769 mV at 86 µA
25 µA to gnd
0.45 V at 23 µA
the
Max
Max
206
485
1.4
DC level
voltage
Page 5 of 61
Table 7
Units
Units
MHz
W
fps
for
on
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