JN5148-001-X NXP Semiconductors, JN5148-001-X Datasheet - Page 54

• Manufacturer Part Number: JN5148-001-X
• Description: IC MCU 802.15.4 32BIT 2.4G 56QFN
• Manufacturer: NXP Semiconductors
• Series: JN5148r

Specifications of JN5148-001-X

• Frequency: 2.4GHz
• Data Rate - Maximum: 667kbps
• Modulation Or Protocol: 802.15.4
• Applications: Home/Building Automation, Industrial Control
• Power - Output: 2.5dBm
• Sensitivity: -95dBm
• Voltage - Supply: 2 V ~ 3.6 V
• Current - Receiving: 17.5mA
• Current - Transmitting: 15mA
• Data Interface: PCB, Surface Mount
• Memory Size: 128kB RAM, 128kB ROM
• Antenna Connector: PCB, Surface Mount
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-QFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 616-1049-2; 935293999531; JN5148-001-X

18 Sample FIFO
A 10 deep FIFO is provided to buffer data between the CPU and either the four-wire digital audio interface or the
DAC/ ADC. It supports single channel input and output data, up to 16 bits wide. When used it can reduce the rate at
which the processor has to generate/process data, and this may allow more efficient operation. Interrupts can be
generated based on fill levels and also FIFO empty and full conditions. Normal configuration of the digital audio
interface or the DAC/ ADC is still required when accessing the data via the FIFO.
When used with the DAC / ADC functions a timing signal is generated by the DAC/ ADC functions to control the
transfer of data to and from the FIFO and the analogue peripherals. The transfers will occur at the sample rate
configured within the DAC / ADC functions.
When the FIFO is linked to the four-wire digital audio interface, timer 2 must be used to generate an internal timing
signal to control the flow of data across the interface. The timer does not require any external pins to be enabled. The
timer should be set up to produce a PWM output with a rising edge generated every time a digital audio transfer is
required. The transfer rate is typically configured to be the audio sample rate, e.g. 8kHz. If the transfer rate is too fast
or slow data will be transferred correctly between the FIFO and the digital audio block.
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JN-DS-JN5148-001 1v6
© NXP Laboratories UK 2010