MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 54

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

liv
0x016C
0x0174
0x0178
0x017C
0x0182
0x0186
0x0200
0x0204
0x0208
0x020C
0x0210
0x0220
0x0224
0x0228
0x022C
0x0230
0x0240
0x0244
0x0248
0x024C
0x0250
0x0260
0x0264
0x0268
MBAR
MBAR
MBAR
Offset
Offset
Offset
UART1 RxFIFO Control/Status Register
UART1 CTS Unlatched Input
UART1 RTS O/P Bit Set Command Register
UART1 RTS O/P Bit Reset Command Register
SDRAM Configuration Register
SDRAM Timing Register
Timer 0 Mode Register
Timer 0 Reference Register
Timer 0 Capture Register
Timer 0 Counter Register
Timer 0 Event Register
Timer 1 Mode Register
Timer 1 Reference Register
Timer 1 Capture Register
Timer 1 Counter Register
Timer 1 Event Register
Timer 2 Mode Register
Timer 2 Reference Register
Timer 2 Capture Register
Timer 2 Counter Register
Timer 2 Event Register
Timer 3 Mode Register
Timer 3 Reference Register
Timer 3 Capture Register
MCF5272 ColdFire
Table xi. UART1 Module Memory Map (continued)
Register Name
Register Name
Register Name
Table xii. SDRAM Controller Memory Map
Table xiii. Timer Module Memory Map
®
Integrated Microprocessor User’s Manual, Rev. 3
U2RxFCSR
U2IP
U2OP1
U2OP0
SDCCR
SDCTR
TMR1
TRR1
TCR1
TCN1
TER1
TMR2
TRR2
TCR2
TCN2
TER2
TMR3
TRR3
TCR3
TCN3
TER3
TMR4
TRR4
TCR4
Old Mnemonic
Old Mnemonic
Old Mnemonic
Freescale Semiconductor
U1RxFCSR
U1IP
U1OP1
U1OP0
SDCR
SDTR
TMR0
TRR0
TCAP0
TCN0
TER0
TMR1
TRR1
TCAP1
TCN1
TER1
TMR2
TRR2
TCAP2
TCN2
TER2
TMR3
TRR3
TCAP3
New Mnemonic
New Mnemonic
New Mnemonic