MCF5272VM66 Freescale Semiconductor, MCF5272VM66 Datasheet - Page 161

• Manufacturer Part Number: MCF5272VM66
• Description: IC MPU 66MHZ COLDFIRE 196-MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF527xr

Specifications of MCF5272VM66

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, UART/USART, USB
• Peripherals: DMA, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (4K x 32)
• Program Memory Type: ROM
• Ram Size: 1K x 32
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 196-MAPBGA
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 196
• Package Type: MA-BGA
• Cpu Speed: 66MHz
• Embedded Interface Type: UART, QSPI, USB, TDM
• Digital Ic Case Style: BGA
• No. Of Pins: 196
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Compliant

Chapter 6
System Integration Module (SIM)
This chapter provides detailed operation information regarding the system integration module (SIM). It
describes the SIM programming model, bus arbitration, power management, and system-protection
functions for the MCF5272.
6.1
The SIM, shown in
ColdFire core processor complex and the internal peripheral devices.
Freescale Semiconductor
DRAM Controller Outputs
SDRAM Controller
SCR
SPR
SDRAM Control
SDRAM Timer
Features
SDCR
SDTR
System Control
ALPR
PMR
WRRR
Figure
WIRR
MCF5272 ColdFire
Chip Select Module
WCR
WER
6-1, provides overall control of the bus and serves as the interface between the
CSORs
8
SYSTEM INTEGRATION MODULE (SIM)
CS[7:0]
Base Address
8
CSBRs
MBAR
Figure 6-1. SIM Block Diagram
®
8
Integrated Microprocessor User’s Manual, Rev. 3
V2 COLDFIRE PROCESSOR COMPLEX
Identification
Bus Interface
Control Signals
External
DIR
32-Bit Address Bus
32-Bit Data Bus
PACNT–
PDCNT
Parallel Port
Interrupt Controller
4 ICRs
PADDR–
PCDDR
INT[6:1]
6
PADR–
PIWR
PCDR
PITR
PIVR
ISR
Two UARTs
Purpose
General-
Ethernet
Timers
QSPI
PWM
Four
PLIC
DMA
USB
6-1