HD6417020SX20IV Renesas Electronics America, HD6417020SX20IV Datasheet - Page 46

SH 1 CORE 32B MPU, 20MHZ/5V, 100

HD6417020SX20IV

Manufacturer Part Number
HD6417020SX20IV
Description
SH 1 CORE 32B MPU, 20MHZ/5V, 100
Manufacturer
Renesas Electronics America
Series
SuperH® SH7020r
Datasheet

Specifications of HD6417020SX20IV

Core Processor
SH-1
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Table 2.8
Addressing
Mode
Indirect
register
addressing
with
displace-
ment
Indirect
indexed
register
addressing
Indirect
GBR
addressing
with
displace-
ment
Indirect
indexed
GBR
addressing
Addressing Modes and Effective Addresses (cont)
Mnemonic
Expression
@(disp:4,
Rn)
@(R0, Rn)
@(disp:8,
GBR)
@(R0,
GBR)
Effective Addresses Calculation
The effective address is Rn plus a 4-bit displacement
(disp). disp is zero-extended, and remains the same
for a byte operation, is doubled for a word operation,
and is quadrupled for a long word operation.
The effective address is the Rn value plus R0.
The effective address is the GBR value plus an 8-bit
displacement (disp). The value of disp is zero-
extended, and remains the same for a byte
operation, is doubled for a word operation, and is
quadrupled for a long word operation.
The effective address is the GBR value plus the R0.
(zero-extended)
(zero-extended)
GBR
1/2/4
1/2/4
GBR
disp
disp
Rn
R0
R0
Rn
+
+
+
+
Rn + disp
+ disp
GBR + R0
Rn + R0
GBR
1/2/4
1/2/4
Equation
Byte: Rn +
disp
Word: Rn +
disp
Long word:
Rn + disp
Rn + R0
Byte: GBR +
disp
Word: GBR +
disp
Long word:
GBR + disp
4
GBR + R0
RENESAS23
2
2
4

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