PIC18F8525-I/PT Microchip Technology, PIC18F8525-I/PT Datasheet - Page 242

• Manufacturer Part Number: PIC18F8525-I/PT
• Description: IC PIC MCU FLASH 24KX16 80TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F8525-I/PT

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 69
• Program Memory Size: 48KB (24K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.75K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3840 B
• Interface Type: MSSP, SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 2 x 8 bit
• Operating Supply Voltage: 4.2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163032
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit
• For Use With: XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18F6525/6621/8525/8621
20.4
The ADCON1, TRISA, TRISF and TRISH registers
control the operation of the A/D port pins. The port pins
needed as analog inputs must have their corresponding
TRIS bits set (input). If the TRIS bit is cleared (output),
the digital output level (V
The A/D operation is independent of the state of the
CHS3:CHS0 bits and the TRIS bits.
FIGURE 20-3:
DS39612B-page 240
Note 1: When reading the port register, all pins
T
Set GO/DONE bit
CY
2: Analog levels on any pin defined as a
Configuring Analog Port Pins
Holding capacitor is disconnected from analog input (typically 100 ns)
- T
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as a digital input will convert as an
analog input. Analog levels on a digitally
configured input will not affect the
conversion accuracy.
digital input may cause the input buffer to
consume current out of the device’s
specification limits.
AD
Conversion starts
T
AD
b9
1 T
A/D CONVERSION T
OH
AD
b8
or V
2 T
OL
AD
b7
) will be converted.
3 T
AD
b6
Next Q4: ADRESH/ADRESL is loaded, GO/DONE bit is cleared,
4 T
AD
b5
AD
5 T
CYCLES
ADIF bit is set, holding capacitor is connected to analog input.
AD
b4
6 T
AD
b3
7 T
20.5
Figure 20-3 shows the operation of the A/D converter
after the GODONE bit has been set. Clearing the GO/
DONE bit during a conversion will abort the current
conversion. The A/D Result register pair will NOT be
updated with the partially completed A/D conversion
sample. That is, the ADRESH:ADRESL registers will
continue to contain the value of the last completed
conversion
ADRESH:ADRESL registers). After the A/D conversion
is aborted, a 2 T
acquisition is started. After this 2 T
on the selected channel is automatically started.
AD
b2
Note:
8
T
AD
b1
A/D Conversions
9 T
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
(or
AD
b0
10
AD
the
T
wait is required before the next
AD
b0
 2005 Microchip Technology Inc.
last
11
value
AD
written
wait, acquisition
to
the