PIC18F8525-I/PT Microchip Technology, PIC18F8525-I/PT Datasheet - Page 22

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PIC18F8525-I/PT

Manufacturer Part Number
PIC18F8525-I/PT
Description
IC PIC MCU FLASH 24KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18F8525-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
69
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.75K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3840 B
Interface Type
MSSP, SPI, I2C, EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163032
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC174011 - MODULE SKT PROMATEII 80TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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PIC18F6525/6621/8525/8621
TABLE 1-2:
DS39612B-page 20
RJ0/ALE
RJ1/OE
RJ2/WRL
RJ3/WRH
RJ4/BA0
RJ5/CE
RJ6/LB
RJ7/UB
V
V
AV
AV
Legend: TTL = TTL compatible input
Note 1: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX (CONFIG3H<0>) is not set (all
SS
DD
SS (8)
DD (8)
RJ0
ALE
RJ1
OE
RJ2
WRL
RJ3
WRH
RJ4
BA0
RJ5
CE
RJ6
LB
RJ7
UB
2: Default assignment for ECCP2/P2A when CCP2MX is set (all devices).
3: External memory interface functions are only available on PIC18F8525/8621 devices.
4: Default assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is set and for
5: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX is not set (Microcontroller mode).
6: PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8525/8621 devices.
7: Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is not set.
8: AV
9: RG5 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.
Pin Name
ST = Schmitt Trigger input with CMOS levels
I
P
Program Memory modes except Microcontroller).
all PIC18F6525/6621 devices.
the part in user or ICSP™ modes. See parameter D001 for details.
DD
= Input
= Power
must be connected to a positive supply and AV
PIC18F6525/6621/8525/8621 PINOUT I/O DESCRIPTIONS (CONTINUED)
PIC18F6X2X
10, 26,
41, 56
38, 57
9, 25,
20
19
Pin Number
PIC18F8X2X
11, 31,
12, 32,
51, 70
48, 71
62
61
60
59
39
40
41
42
26
25
SS
Type
Pin
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
must be connected to a ground reference for proper operation of
O
O
O
O
O
O
O
O
P
P
P
P
Buffer
= Output
= Open-Drain (no P diode to V
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
PORTJ is a bidirectional I/O port
Ground reference for logic and I/O pins.
Positive supply for logic and I/O pins.
Ground reference for analog modules.
Positive supply for analog modules.
Digital I/O.
External memory address latch enable.
Digital I/O.
External memory output enable.
Digital I/O.
External memory write low control.
Digital I/O.
External memory write high control.
Digital I/O.
System bus byte address 0 control.
Digital I/O
External memory access indicator.
Digital I/O.
External memory low byte select.
Digital I/O.
External memory high byte select.
 2005 Microchip Technology Inc.
Description
DD
)
(6)
.

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