PIC18LF452-I/PT Microchip Technology, PIC18LF452-I/PT Datasheet - Page 94

IC MCU FLASH 16KX16 A/D 44TQFP

PIC18LF452-I/PT

Manufacturer Part Number
PIC18LF452-I/PT
Description
IC MCU FLASH 16KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF452-I/PT

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
256 B
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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PIC18FXX2
TABLE 9-3:
TABLE 9-4:
DS39564B-page 92
PORTB
LATB
TRISB
INTCON
INTCON2
INTCON3
Legend: x = unknown, u = unchanged. Shaded cells are not used by PORTB.
RB0/INT0
RB1/INT1
RB2/INT2
RB3/CCP2
RB4
RB5/PGM
RB6/PGC
RB7/PGD
Legend: TTL = TTL input, ST = Schmitt Trigger input
Name
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
Name
2: This buffer is a Schmitt Trigger input when used in Serial Programming mode.
3: A device configuration bit selects which I/O pin the CCP2 pin is multiplexed on.
4: This buffer is a Schmitt Trigger input when configured as the CCP2 input.
5: Low Voltage ICSP Programming (LVP) is enabled by default, which disables the RB5 I/O function. LVP
(5)
(3)
LATB Data Output Register
PORTB Data Direction Register
must be disabled to enable RB5 as an I/O pin and allow maximum compatibility to the other 28-pin and
40-pin mid-range devices.
INT2IP
RBPU
GIEH
Bit 7
RB7
GIE/
PORTB FUNCTIONS
SUMMARY OF REGISTERS ASSOCIATED WITH PORTB
INTEDG0
INT1IP
PEIE/
GIEL
Bit 6
RB6
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
TTL/ST
INTEDG1
TMR0IE
Buffer
Bit 5
RB5
TTL
(1)
(1)
(1)
(4)
(2)
(2)
(2)
INTEDG2
INT0IE
INT2IE
Input/output pin or external interrupt input0.
Internal software programmable weak pull-up.
Input/output pin or external interrupt input1.
Internal software programmable weak pull-up.
Input/output pin or external interrupt input2.
Internal software programmable weak pull-up.
Input/output pin or Capture2 input/Compare2 output/PWM output when
CCP2MX configuration bit is enabled.
Internal software programmable weak pull-up.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Low voltage ICSP enable pin.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Serial programming clock.
Input/output pin (with interrupt-on-change).
Internal software programmable weak pull-up.
Serial programming data.
Bit 4
RB4
INT1IE
RBIE
Bit 3
RB3
TMR0IP
TMR0IF
Bit 2
RB2
INT0IF
INT2IF
Bit 1
RB1
Function
INT1IF
RBIP
Bit 0
RBIF
RB0
2002 Microchip Technology Inc.
xxxx xxxx
xxxx xxxx
1111 1111
0000 000x
1111 -1-1
11-0 0-00
POR, BOR
Value on
uuuu uuuu
uuuu uuuu
1111 1111
0000 000u
1111 -1-1
11-0 0-00
Value on
All Other
RESETS

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