PIC18LF452-I/PT Microchip Technology, PIC18LF452-I/PT Datasheet - Page 120

• Manufacturer Part Number: PIC18LF452-I/PT
• Description: IC MCU FLASH 16KX16 A/D 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF452-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 32KB (16K x 16)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 34
• Eeprom Size: 256 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: MSSP/SPI/I2C/PSP/USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• Data Rom Size: 256 B
• Height: 1 mm
• Length: 10 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2 V
• Width: 10 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC18FXX2
14.1
Capture/Compare/PWM Register 1 (CCPR1) is com-
prised of two 8-bit registers: CCPR1L (low byte) and
CCPR1H (high byte). The CCP1CON register controls
the operation of CCP1. All are readable and writable.
TABLE 14-1:
TABLE 14-2:
DS39564B-page 118
CCPx Mode CCPy Mode
Compare
Capture
Capture
PWM
PWM
PWM
CCP Mode
Compare
Capture
CCP1 Module
PWM
Compare
Compare
Compare
Capture
Capture
CCP MODE - TIMER
RESOURCE
INTERACTION OF TWO CCP MODULES
PWM
TMR1 or TMR3 time-base. Time-base can be different for each CCP.
which clears either TMR1 or TMR3 depending upon which time-base is used.
The compare(s) could be configured for the special event trigger,
which clears TMR1 or TMR3 depending upon which time-base is used.
(TMR2 interrupt).
None
The compare could be configured for the special event trigger,
The PWMs will have the same frequency and update rate
None
Timer1 or Timer3
Timer1 or Timer3
Timer Resource
Timer2
14.2
Capture/Compare/PWM Register2 (CCPR2) is com-
prised of two 8-bit registers: CCPR2L (low byte) and
CCPR2H (high byte). The CCP2CON register controls
the operation of CCP2. All are readable and writable.
Interaction
CCP2 Module
2002 Microchip Technology Inc.