PIC18LF452-I/PT Microchip Technology, PIC18LF452-I/PT Datasheet - Page 59

IC MCU FLASH 16KX16 A/D 44TQFP

PIC18LF452-I/PT

Manufacturer Part Number
PIC18LF452-I/PT
Description
IC MCU FLASH 16KX16 A/D 44TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF452-I/PT

Program Memory Type
FLASH
Program Memory Size
32KB (16K x 16)
Package / Case
44-TQFP, 44-VQFP
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Eeprom Size
256 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP/SPI/I2C/PSP/USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
Data Rom Size
256 B
Height
1 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Width
10 mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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REGISTER 5-1:
2002 Microchip Technology Inc.
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
EECON1 REGISTER (ADDRESS FA6h)
EEPGD: FLASH Program or Data EEPROM Memory Select bit
1 = Access FLASH Program memory
0 = Access Data EEPROM memory
CFGS: FLASH Program/Data EE or Configuration Select bit
1 = Access Configuration registers
0 = Access FLASH Program or Data EEPROM memory
Unimplemented: Read as '0'
FREE: FLASH Row Erase Enable bit
1 = Erase the program memory row addressed by TBLPTR on the next WR command
0 = Perform write only
WRERR: FLASH Program/Data EE Error Flag bit
1 = A write operation is prematurely terminated
0 = The write operation completed
Note:
WREN: FLASH Program/Data EE Write Enable bit
1 = Allows write cycles
0 = Inhibits write to the EEPROM
WR: Write Control bit
1 = Initiates a data EEPROM erase/write cycle or a program memory erase cycle or write cycle.
0 = Write cycle to the EEPROM is complete
RD: Read Control bit
1 = Initiates an EEPROM read
0 = Does not initiate an EEPROM read
bit 7
Legend:
R = Readable bit
- n = Value at POR
EEPGD
R/W-x
(cleared by completion of erase operation)
(any RESET during self-timed programming in normal operation)
(The operation is self timed and the bit is cleared by hardware once write is complete. The
WR bit can only be set (not cleared) in software.)
(Read takes one cycle. RD is cleared in hardware. The RD bit can only be set (not cleared)
in software. RD bit cannot be set when EEPGD = 1.)
When a WRERR occurs, the EEPGD and CFGS bits are not cleared. This allows
tracing of the error condition.
R/W-x
CFGS
U-0
W = Writable bit
’1’ = Bit is set
R/W-0
FREE
WRERR
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-x
WREN
R/W-0
PIC18FXX2
x = Bit is unknown
R/S-0
WR
DS39564B-page 57
R/S-0
RD
bit 0

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