EVAL-ADT7467EBZ ON Semiconductor, EVAL-ADT7467EBZ Datasheet - Page 26

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EVAL-ADT7467EBZ

Manufacturer Part Number
EVAL-ADT7467EBZ
Description
BOARD EVALUATION FOR ADT7467
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of EVAL-ADT7467EBZ

Sensor Type
Temperature
Sensing Range
-40°C ~ 120°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1.5°C
Voltage - Supply
3 V ~ 5.5 V
Embedded
No
Utilized Ic / Part
ADT7467
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADT7467
Configuring THERM Behavior
1.
2.
3.
4.
5.
Configure the relevant pin as the THERM timer input.
Setting Bit 0 and Bit 1 (Pin 9 Func) of Configuration
Register 4 (0x7D) enables THERM timer/output
functionality on Pin 9 (Bit 1, THERM, of Configuration
Register 3 must also be set). Pin 9 can also be used as
TACH4.
Select the desired fan behavior for THERM timer events.
Assuming that the fans are running, setting Bit 2 (BOOST
bit) of Configuration Register 3 (0x78) causes all fans to
run at 100% duty cycle whenever THERM is asserted. This
allows fail-safe system cooling. If this bit is 0, the fans run
at their current settings and are not affected by THERM
events. If the fans are not already running when THERM is
asserted, the fans do not run to full speed.
Select whether THERM timer events should generate
SMBALERT interrupts.
When set, Bit 5 (F4P) of Mask Register 2 (0x75) masks
SMBALERTs when the THERM timer limit value is
exceeded. This bit should be cleared if SMBALERT based
on THERM events are required.
Select a suitable THERM limit value.
This value determines whether an SMBALERT is generated
upon the first THERM assertion, or if only a cumulative
THERM assertion time limit is exceeded. A value of 0x00
causes an SMBALERT to be generated upon the first
THERM assertion.
Select a THERM monitoring time.
This value specifies how often OS or BIOS level software
checks the THERM timer. For example, BIOS could read
the THERM timer once an hour to determine the cumula-
tive THERM assertion time. If, for example, the total
THERM assertion time is <22.76 ms in Hour 1, >182.08
ms in Hour 2, and >2.914 sec in Hour 3, this can indicate
that system performance is degrading significantly, because
THERM is asserting more frequently on an hourly basis.
Setting Bit 1 (THERM timer enable) of Configuration
Register 3 (0x78) enables the THERM timer monitoring
functionality. This is disabled on Pin 9 by default.
Rev. 3 | Page 26 of 77 | www.onsemi.com
Configuring the THERM Pin as an Output
In addition to monitoring THERM as an input, the ADT7467
can optionally drive THERM low as an output. In cases where
PROCHOT is bidirectional, THERM can be used to throttle the
processor by asserting PROCHOT. The user can preprogram
system-critical thermal limits. If the temperature exceeds a
thermal limit by 0.25°C, THERM asserts low. If the temperature
is still above the thermal limit on the next monitoring cycle,
THERM stays low. THERM remains asserted low until the
temperature is equal to or below the thermal limit. Because the
temperature for that channel is measured only once for every
monitoring cycle, it is guaranteed to remain low for at least one
monitoring cycle after THERM is asserted.
The THERM pin can be configured to assert low if the Remote 1,
local, or Remote 2 THERM temperature limits are exceeded by
0.25°C. The THERM temperature limit registers are at Register
0x6A, Register 0x6B, and Register 0x6C, respectively. Setting
Bit 3 of Register 0x5F, Register 0x60, and Register 0x61 enables
the THERM output feature for the Remote 1, local, and Remote 2
temperature channels, respectively. Figure 33 shows how the
THERM pin asserts low as an output in the event of a critical
overtemperature.
An alternative method of disabling THERM is to program the
THERM temperature limit to −64°C or less in Offset 64 mode,
or to −128°C or less in twos complement mode; therefore, for
THERM temperature limit values less than −64°C or −128°C,
respectively, THERM is disabled.
Figure 33. Asserting THERM as an Output, Based on Tripping THERM Limits
THERM
THERM LIMIT
THERM LIMIT
Alternatively, OS or BIOS level software can timestamp
when the system is powered on. If an SMBALERT is
generated because the THERM timer limit has been
exceeded, another timestamp can be taken. The difference
in time can be calculated for a fixed THERM timer limit.
For example, if it takes one week for a THERM timer limit
of 2.914 sec to be exceeded and the next time it takes only
1 hour, this is an indication of a serious degradation in
system performance.
+0.25°C
TEMP
MONITORING
ADT7467
CYCLE

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