EVAL-ADT7467EBZ ON Semiconductor, EVAL-ADT7467EBZ Datasheet - Page 14

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EVAL-ADT7467EBZ

Manufacturer Part Number
EVAL-ADT7467EBZ
Description
BOARD EVALUATION FOR ADT7467
Manufacturer
ON Semiconductor
Series
dBCool®r
Datasheet

Specifications of EVAL-ADT7467EBZ

Sensor Type
Temperature
Sensing Range
-40°C ~ 120°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1.5°C
Voltage - Supply
3 V ~ 5.5 V
Embedded
No
Utilized Ic / Part
ADT7467
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADT7467
Alert Response Address
Alert response address (ARA) is a feature of SMBus devices that
allows an interrupting device to identify itself to the host when
multiple devices exist on the same bus.
The SMBALERT output can be used as either an interrupt
output or an SMBALERT. One or more outputs can be
connected to a common SMBALERT line connected to the
master. If a device’s SMBALERT line goes low, the following
procedure occurs:
1.
2.
3.
SMBALERT is pulled low.
The master initiates a read operation and sends the alert
response address (ARA = 0001 100). This is a general call
address that must not be used as a specific device address.
The device whose SMBALERT output is low responds to
the alert response address, and the master reads its device
address. The address of the device is now known and can
be interrogated in the usual way.
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4.
5.
SMBus TIMEOUT
The ADT7467 includes an SMBus timeout feature. If there is no
SMBus activity for 35 ms, the ADT7467 assumes that the bus is
locked and releases the bus. This prevents the device from
locking or holding the SMBus in anticipation of receiving data.
Some SMBus controllers cannot handle the SMBus timeout
feature, so it can be disabled.
Configuration Register 1 (0x40)
<6> TODIS = 0, SMBus timeout enabled (default)
<6> TODIS = 1, SMBus timeout disabled
If more than one device’s SMBALERT output is low, the
one with the lowest device address has priority in accor-
dance with normal SMBus arbitration.
Once the ADT7467 has responded to the alert response
address, the master must read the status registers. The
SMBALERT is cleared only if the error condition is absent.

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