MC56F8323EVM Freescale Semiconductor, MC56F8323EVM Datasheet - Page 70

KIT EVALUATION FOR MC56F8323

MC56F8323EVM

Manufacturer Part Number
MC56F8323EVM
Description
KIT EVALUATION FOR MC56F8323
Manufacturer
Freescale Semiconductor
Type
DSPr

Specifications of MC56F8323EVM

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8322 and MC56F8323
Data Bus Width
16 bit
Interface Type
RS-232
For Use With/related Products
MC56F8322, MC56F8323
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
5.6.7
5.6.7.1
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.7.2
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.7.3
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
5.6.7.4
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
70
Base + $6
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
00 = IRQ disabled (default)
01 = IRQ is priority level 0
10 = IRQ is priority level 1
11 = IRQ is priority level 2
RESET
Write
Read
Interrupt Priority Register 6 (IPR6)
Quadrature Decoder 0, INDEX Pulse Interrupt Priority Level (DEC0_XIRQ
Timer C, Channel 0 Interrupt Priority Level (TMRC0 IPL)—
Bits 15–14
Reserved—Bits 13–4
IPL)—Bits 3–2
Quadrature Decoder 0, HOME Signal Transition or Watchdog Timer
Interrupt Priority Level (DEC0_HIRQ IPL)—Bits 1–0
TMRC0 IPL
15
0
14
0
Figure 5-9 Interrupt Priority Register 6 (IPR6)
13
0
0
12
0
0
56F8323 Technical Data, Rev. 17
11
0
0
10
0
0
9
0
0
8
0
0
7
0
0
6
0
0
5
0
0
4
0
0
DEC0_XIRQ
3
0
Freescale Semiconductor
IPL
2
0
DEC0_HIRQ
1
0
IPL
Preliminary
0
0

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