MC56F8323EVM Freescale Semiconductor, MC56F8323EVM Datasheet - Page 36

KIT EVALUATION FOR MC56F8323

MC56F8323EVM

Manufacturer Part Number
MC56F8323EVM
Description
KIT EVALUATION FOR MC56F8323
Manufacturer
Freescale Semiconductor
Type
DSPr

Specifications of MC56F8323EVM

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8322 and MC56F8323
Data Bus Width
16 bit
Interface Type
RS-232
For Use With/related Products
MC56F8322, MC56F8323
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
36
1. Two words are allocated for each entry in the vector table. This does not allow the full address range to be referenced
2. If the VBA is set to $0200, the first two locations of the vector table will overlay the chip reset addresses.
SCI1
SCI1
DEC0
DEC0
TMRC
TMRC
TMRC
TMRC
TMRA
TMRA
TMRA
TMRA
SCI0
SCI0
SCI0
SCI0
ADCA
ADCA
PWMA
PWMA
core
Peripheral
from the vector table, providing only 19 bits of address.
45
46
49
50
56
57
58
59
64
65
66
67
68
69
71
72
74
76
78
80
81
82
Number
Vector
Table 4-3 Interrupt Vector Table Contents
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
- 1
0 - 2
Priority
Level
P:$5A
P:$5C
P:$62
P:$64
P:$70
P:$72
P:$74
P:$76
P:$80
P:$82
P:$84
P:$86
P:$88
P:$8A
P:$8E
P:$90
P:$94
P:$98
P:$9C
P:$A0
P:$A2
P:$A4
Vector Base
Address +
56F8323 Technical Data, Rev. 17
Timer A Channel 0
Timer A Channel 1
Timer A Channel 2
Timer A Channel 3
SCI 1 Receiver Error
SCI 1 Receiver Full
Reserved
Quadrature Decoder #0 Home Switch or Watchdog
Quadrature Decoder #0 INDEX Pulse
Reserved
Timer C Channel 0
Timer C Channel 1
Timer C Channel 2
Timer C Channel 3
Reserved
SCI 0 Transmitter Empty
SCI 0 Transmitter Idle
Reserved
SCI 0 Receiver Error
SCI 0 Receiver Full
Reserved
ADC A Conversion Complete / End of Scan
Reserved
ADC A Zero Crossing or Limit Error
Reserved
Reload PWM A
Reserved
PWM A Fault
SW Interrupt LP
Interrupt Function
1
(Continued)
Freescale Semiconductor
Preliminary

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