MC56F8323EVM Freescale Semiconductor, MC56F8323EVM Datasheet - Page 63

KIT EVALUATION FOR MC56F8323

MC56F8323EVM

Manufacturer Part Number
MC56F8323EVM
Description
KIT EVALUATION FOR MC56F8323
Manufacturer
Freescale Semiconductor
Type
DSPr

Specifications of MC56F8323EVM

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC56F8322 and MC56F8323
Data Bus Width
16 bit
Interface Type
RS-232
For Use With/related Products
MC56F8322, MC56F8323
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
5.6.2.1
This bit field is reserved or not implemented. It is read as 0 and cannot be modified by writing.
5.6.2.2
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3.
It is disabled by default.
5.6.2.3
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3.
It is disabled by default.
5.6.2.4
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 1 through 3.
It is disabled by default.
5.6.3
Freescale Semiconductor
Preliminary
Base + $2
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
00 = IRQ disabled (default)
01 = IRQ is priority level 1
10 = IRQ is priority level 2
11 = IRQ is priority level 3
RESET
Write
Read
Interrupt Priority Register 2 (IPR2)
Reserved—Bits 15–6
EOnCE Receive Register Full Interrupt Priority Level
(RX_REG IPL)—Bits 5–4
EOnCE Transmit Register Empty Interrupt Priority Level
(TX_REG IPL)—Bits 3–2
EOnCE Trace Buffer Interrupt Priority Level (TRBUF IPL)—
Bits 1–0
FMCBE IPL
15
0
14
0
Figure 5-5 Interrupt Priority Register 2 (IPR2)
13
FMCC IPL
0
12
0
56F8323 Technical Data, Rev. 17
FMERR IPL
11
0
10
0
LOCK IPL
9
0
8
0
7
0
LVI IPL
6
0
5
0
0
4
0
0
3
0
0
2
0
0
Register Descriptions
1
IRQA IPL
0
0
0
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