R0E0200F0EMU00 Renesas Electronics America, R0E0200F0EMU00 Datasheet - Page 70

• Manufacturer Part Number: R0E0200F0EMU00
• Description: EMULATOR E200 MAIN BODY-SH7780
• Manufacturer: Renesas Electronics America
• Series: SuperH®r
• Type: In-Circuit Emulatorr

Specifications of R0E0200F0EMU00

• Contents: Emulator Board, Cables, Software and Documentation
• For Use With/related Products: SH7780
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 1.4 Measurement Items (cont)
Classification
Instruction bus
performance
(cont)
Operand bus
performance
44
Type
Instruction
(cont)
Access
count
Measurement Item
Number of
instruction cache
miss
Number of internal-
RAM access for
instruction fetch (XY-
RAM or L memory
(O-L memory))
Number of I-L
memory access for
instruction fetch
Number of U
memory access for
instruction fetch
Number of memory
access for operand
fetch (READ)
Number of memory
access for operand
fetch (WRITE)
Number of operand
cache access
(READ)
Number of operand
cache access
(WRITE)
Option
ICM
XL
ILIF
ULF
MR
MW
CR
CW
Note
The number of cache misses
by an instruction cache access
(the number of accesses to the
outside of the CPU core due to
a cache miss).
The number of accesses for
the XY memory in the MPU
during memory accesses of the
opcode.
The number of accesses for
the I-L memory in the MPU
during memory accesses of the
opcode.
The number of accesses for
the U memory in the MPU
during memory accesses of the
opcode.
The number of memory
accesses by an operand read
(equal to loading on the
operand bus).
Accesses by the PREF
instruction or canceled
accesses are not included.
The number of memory
accesses by an operand write
(equal to storing memory on
the operand bus).
Canceled accesses are not
included.
The number of operand-cache
reads during memory access
(read) of an operand.
The number of operand-cache
reads during memory access
(write) of an operand.