HS38000EPI61H Renesas Electronics America, HS38000EPI61H Datasheet - Page 95

• Manufacturer Part Number: HS38000EPI61H
• Description: DEV EMULATOR BASE UNIT H8/38000
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of HS38000EPI61H

• Contents: E6000 Emulator and CD-ROM
• For Use With/related Products: 38000 Series
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

5.8
The emulator acquires the results of each instruction execution into the trace buffer as trace information and
displays it in the [Trace] window. The conditions for the trace information acquisition can be specified in the
[Trace Acquisition] dialog box.
Since trace information in bus-cycles is acquired by the hardware circuit and stored in the trace buffer, the
realtime operation is retained. The [Trace] window displays the content of the trace buffer, which records up to
32,768 bus cycles from the last program run and is always updated.
5.8.1
To open the [Trace] window, choose [View -> Code -> Trace] or click the [Trace] toolbar button (
5.8.2
When the emulator does not set the acquisition condition of the trace information, all bus cycles are acquired by
default without any condition (free trace mode).
In the free trace mode, trace acquisition is started with the execution of the user program and stopped by halting
the user program. The acquired trace information is displayed in the [Trace] window.
This window displays the following trace information items:
[PTR]:
[Address]:
[Instruction]:
[Data]:
[R/W]:
[Area]:
74
Viewing the Trace Information
Opening the [Trace] Window
Acquiring Trace Information
Cycle number in the trace buffer. When the most recent record is record 0, earlier
record numbers go backwards (-1, -2, ...). If a delay count has been set, the cycle
number where the trace stop condition has been satisfied is record 0. For the cycle
(during delay) executed until the trace has stopped, earlier record numbers go forward
(+1, +2, ...) the most recent record.
Address (6-digit hexadecimal)
Disassembled code of the executed instruction
Data bus value, displayed as 2-digit or 4-digit hexadecimal
Whether access was read (RD) or write (WR)
Memory area being accessed; ROM, RAM, 8- or 16-bit I/O, 8- or 16-bit EXT
(external), or DTC RAM (not available when a time stamp is acquired)
Figure 5.29 [Trace] Window
).