HS38000EPI61H Renesas Electronics America, HS38000EPI61H Datasheet - Page 216

• Manufacturer Part Number: HS38000EPI61H
• Description: DEV EMULATOR BASE UNIT H8/38000
• Manufacturer: Renesas Electronics America
• Type: Microcontrollerr

Specifications of HS38000EPI61H

• Contents: E6000 Emulator and CD-ROM
• For Use With/related Products: 38000 Series
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

8.1.7
The following tables show examples of signals to indicate the bus states and areas that can be acquired by the
emulator.
Table 8.7
Table 8.8
Note: The signals to indicate bus states and areas are used to set the [Bus/Area] condition of the event point.
8.1.8
The emulator of HS38000EPI61H + HS3800EBK61H incorporates the bus monitoring circuit as the standard,
which thus allows a use of the monitoring function to update the content of memory without affecting the
realtime operation.
HS3800EPI60H does not incorporate the bus monitoring circuit. To use the monitoring function, the bus monitor
board (HS6000EBR01H) is required.
8.1.9
The emulator of HS38000EPI61H + HS3800EBK61H incorporates the bus monitoring circuit as the standard,
which thus allows a use of trigger points that can be set on the [Trigger] sheet in the [Event] window.
HS3800EPI60H does not incorporate the bus monitoring circuit. Connecting the bus monitor board
(HS6000EBR01H) allows use of trigger points that can be set on the [Trigger] sheet in the [Event] window.
Bus State
CPU Prefetch
CPU Data
CPU Medium
Prefetch
CPU Medium Data
Sub Active Prefetch
Sub Active Data
Area
On-chip ROM
On-chip RAM
On-chip I/O
LCD RAM
They can also be acquired as the trace information. The bus state signals are also used to set the
condition not to acquire the trace ([Suppress] option) and in the Access Count Of Specified Range
Measurement mode for measuring the hardware performance ([Access Type] option).
Monitoring Function
Trigger Points
Signals to Indicate Bus States and Areas
Bus State Signals Acquired by the Emulator
Area Signals Acquired by the Emulator
Trace Display (Status)
CPU_PREFETCH
CPU
CPU_MEDIUM_PREFETCH
CPU_MEDIUM_DATA
SUB_ACTIVE_PREFETCH
SUB_ACTIVE_DATA
Trace Display (Area)
IN-ROM
IN-RAM
I/O
LCD-RAM
Description
CPU prefetch cycles (high-speed mode)
CPU data access cycles (high-speed mode)
CPU prefetch cycles (medium-speed mode)
CPU data access cycles (medium-speed mode)
Prefetch cycles in subactive mode
Data access cycles in subactive mode
Description
Internal ROM
Internal RAM
I/O
LCD RAM area
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