ADZS-HPUSB-ICE Analog Devices Inc, ADZS-HPUSB-ICE Datasheet - Page 21

• Manufacturer Part Number: ADZS-HPUSB-ICE
• Description: TOOL EMULATOR USB HP CROSSCORE
• Manufacturer: Analog Devices Inc
• Type: In-Circuit Emulator Systemr

Specifications of ADZS-HPUSB-ICE

• Contents: HPUSB-ICE, JTAG Pod, Power Supply and Cable
• Silicon Family Name: Blackfin
• Core Architecture: Blackfin
• Ic Product Type: Emulator
• Kit Contents: USB-based Emulator W/ 14-pin JTAG Connector, USB Cable
• Features: USB 2.0, Up To 1.5MB/sec
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADSP-219x Blackfin®, SHARC® and TigerSHARC® DSPs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: ADZU-HPUSB-ICE; ADZU-HPUSB-ICE

JTAG Frequency Selection
HPUSB, USB, HPPCI and MSP430 Emulators User’s Guide
The VisualDSP++ Configurator’s ICE Test utility allows you to configure
and test your emulator hardware. ICE Test provides emulator detection,
JTAG I/O voltage selection, and JTAG frequency selection. Use the ICE
Test to test the target. If errors are encountered, they are reported imme-
diately and the test ends. Each error message recommends a solution to
the problem.
Refer to VisualDSP++ online Help for information about the
VisualDSP++ Configurator and the ICE Test utility.
High-Performance PCI-ICE and High-Performance USB-ICE emulators
support a JTAG clock operation up to 50 MHz. USB-ICE emulators
support a JTAG clock operation of 10 MHz.
There is a relationship between the JTAG frequency and the core clock
frequency of the processor. Typically, the core clock runs at a frequency
that is more than 2x the JTAG clock’s frequency. On newer Analog
Devices processors, the core clock is a variable that is sometimes set by
switches or by software.
Choosing the JTAG Frequency Selection from the Settings menu in
VisualDSP++ opens the JTAG Frequency Selection dialog box shown in
Figure 1-2
which the JTAG Test Clock signal (TCK) runs.
The tests listed in the Status box are run when you click the Test button
on the JTAG Frequency Selection dialog box. The blue arrow points to
the frequency currently being used. The arrow does not change after you
If the core/JTAG clock relation is not followed, scan failures may
prevent the emulator from connecting to the processor.
Not all frequencies listed above appear for all processor families.
The displayed frequencies depend upon the processor family.
and
Figure
1-3. The dialog box is used to change the rate at
Getting Started
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