C8051F060-TB Silicon Laboratories Inc, C8051F060-TB Datasheet - Page 21
![BOARD PROTOTYPING W/C8051F060](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F060-TB
Manufacturer Part Number
C8051F060-TB
Description
BOARD PROTOTYPING W/C8051F060
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F060-TB
Contents
Board
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F060
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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VRGND0
CNVSTR
CNVSTR
MONEN
XTAL1
XTAL2
VREFD
VREF0
AIN0G
VBGAP
VREF1
VRGND
AIN1G
VBGAP
/RST
DGND
DGND
DGND
AGND
VREF
DAC0
DAC1
AVDD
AGND
AGND
AIN0
AGND
AIN1
VDD
VDD
VDD
AV+
TCK
TMS
TDI
TDO
AV+
AV+
0
0
1
1
1
VDD Monitor
Digital Power
External Oscillator
Trimmed Internal
Oscillator
Circuit
JTAG
Logic
(12-Bit)
Analog Power
VREF
DAC0
(16-Bit)
(16-Bit)
1Msps
1Msps
ADC0
ADC1
Boundary Scan
WDT
Debug HW
Figure 1.1. C8051F060 / C8051F062 Block Diagram
System Clock
D
C
D
A
D
C
D
A
T
A
A
0
A
T
A
1
Reset
+
-
C
o
8
0
5
1
e
r
External Data Memory Bus
D
F
F
I
Interface
4kbyte RAM
DMA
CANRAM
256 byte
64kbyte
32X136
FLASH
RAM
SFR Bus
Rev. 1.2
Control
EMIF
C8051F060/1/2/3/4/5/6/7
Timers 0, 1,
P3 Latches
P0, P1, P2,
SPI Bus
UART0
UART1
SMBus
CAN
2.0B
PCA
2,3,4
Bus Control
Address Bus
Data Bus
ADC2
200ksps
(10-Bit)
CP2
Data Latch
CP1
Ctrl Latch
C
R
O
S
S
B
A
R
Addr[15:8]
P4 Latch
P5 Latch
P6 Latch
Addr[7:0]
P7 Latch
CP0
A
M
U
X
+
-
+
-
Drv
Drv
Drv
Drv
P0
P1
P2
P3
Sensor
+
-
Temp
DRV
DRV
DRV
DRV
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
P4
P5
P6
P7
P1.0/
AIN2.0
P1.7/
AIN2.7
P0.0
P0.7
P2.0
P2.7
P3.0
P3.7
CANTX
CANRX
VREF2
P4.5
P4.6
P4.7
P5.0
P5.7
P6.0
P6.7
P7.0
P7.7
21
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