C8051F060-TB Silicon Laboratories Inc, C8051F060-TB Datasheet - Page 166
![BOARD PROTOTYPING W/C8051F060](/photos/28/94/289414/tqfp-100_sml.jpg)
C8051F060-TB
Manufacturer Part Number
C8051F060-TB
Description
BOARD PROTOTYPING W/C8051F060
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F060-TB
Contents
Board
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F060
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- Current page: 166 of 328
- Download datasheet (2Mb)
C8051F060/1/2/3/4/5/6/7
14.7.1. Enable/Reset WDT
The watchdog timer is both enabled and reset by writing 0xA5 to the WDTCN register. The user's applica-
tion software should include periodic writes of 0xA5 to WDTCN as needed to prevent a watchdog timer
overflow. The WDT is enabled and reset as a result of any system reset.
14.7.2. Disable WDT
Writing 0xDE followed by 0xAD to the WDTCN register disables the WDT. The following code segment
illustrates disabling the WDT:
The writes of 0xDE and 0xAD must occur within 4 clock cycles of each other, or the disable operation is
ignored. Interrupts should be disabled during this procedure to avoid delay between the two writes.
14.7.3. Disable WDT Lockout
Writing 0xFF to WDTCN locks out the disable feature. Once locked out, the disable operation is ignored
until the next system reset. Writing 0xFF does not enable or reset the watchdog timer. Applications always
intending to use the watchdog should write 0xFF to WDTCN in the initialization code.
14.7.4. Setting WDT Interval
WDTCN.[2:0] control the watchdog timeout interval. The interval is given by the following equation:
166
4
3
CLR
MOV
MOV
SETB
+
WDTCN 2 0
EA
WDTCN,#0DEh
WDTCN,#0ADh
EA
–
T
sysclk
; disable all interrupts
; disable software watchdog timer
; re-enable interrupts
; where T
sysclk
is the system clock period.
Rev. 1.2
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