C8051F120-TB Silicon Laboratories Inc, C8051F120-TB Datasheet - Page 254

• Manufacturer Part Number: C8051F120-TB
• Description: BOARD PROTOTYPING W/C8051F120
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F120-TB

• Contents: Board
• Processor To Be Evaluated: C8051F12x and C8051F13x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F120
• Silicon Family Name: C8051F12x
• Kit Contents: Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F120
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

C8051F120/1/2/3/4/5/6/7
C8051F130/1/2/3
254
Bits7–0: P4.[7:0]: Port4 Output Latch Bits.
Bits7–0: P4MDOUT.[7:0]: Port4 Output Mode Bits.
Note:
P4.7
R/W
R/W
Bit7
Bit7
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (Open-Drain if corresponding P4MDOUT.n bit = 0). See SFR Definition
18.14.
Read - Returns states of I/O pins.
0: P4.n pin is logic low.
1: P4.n pin is logic high.
0: Port Pin output mode is configured as Open-Drain.
1: Port Pin output mode is configured as Push-Pull.
P4.7 (/WR), P4.6 (/RD), and P4.5 (ALE) can be driven by the External Data Memory Interface.
See
more information.
Section “17. External Data Memory Interface and On-Chip XRAM” on page 219
P4.6
R/W
R/W
Bit6
Bit6
SFR Definition 18.14. P4MDOUT: Port4 Output Mode
P4.5
R/W
R/W
Bit5
Bit5
SFR Definition 18.13. P4: Port4 Data
P4.4
R/W
R/W
Bit4
Bit4
Rev. 1.4
P4.3
R/W
R/W
Bit3
Bit3
P4.2
R/W
R/W
Bit2
Bit2
P4.1
R/W
R/W
Bit1
Bit1
SFR Address:
SFR Address:
SFR Page:
SFR Page:
P4.0
R/W
R/W
Bit0
Bit0
0xC8
F
0x9C
F
Addressable
00000000
Reset Value
Reset Value
11111111
Bit
for