C8051F120-TB Silicon Laboratories Inc, C8051F120-TB Datasheet - Page 235

BOARD PROTOTYPING W/C8051F120

C8051F120-TB

Manufacturer Part Number
C8051F120-TB
Description
BOARD PROTOTYPING W/C8051F120
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F120-TB

Contents
Board
Processor To Be Evaluated
C8051F12x and C8051F13x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F120
Silicon Family Name
C8051F12x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F120
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
C8051F120-TB
Manufacturer:
Silicon Labs
Quantity:
135
18. Port Input/Output
The devices are fully integrated mixed-signal System on a Chip MCUs with 64 digital I/O pins (100-pin
TQFP packaging) or 32 digital I/O pins (64-pin TQFP packaging), organized as 8-bit Ports. All ports are
both bit- and byte-addressable through their corresponding Port Data registers. All Port pins are 5 V-toler-
ant, and all support configurable Open-Drain or Push-Pull output modes and weak pullups. A block dia-
gram of the Port I/O cell is shown in Figure 18.1. Complete Electrical Specifications for the Port I/O pins
are given in Table 18.1.
/WEAK-PULLUP
PUSH-PULL
/PORT-OUTENABLE
PORT-OUTPUT
ANALOG INPUT
PORT-INPUT
Analog Select
(Ports 1, 2, and 3)
Figure 18.1. Port I/O Cell Block Diagram
Rev. 1.4
C8051F120/1/2/3/4/5/6/7
DGND
VDD
C8051F130/1/2/3
VDD
(WEAK)
PORT
PAD
235

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