C8051F320-TB Silicon Laboratories Inc, C8051F320-TB Datasheet - Page 231
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
C8051F320-TB
Manufacturer Part Number
C8051F320-TB
Description
BOARD PROTOTYPING W/C8051F320
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F320-TB
Contents
Board
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F320
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Note: The CEXn input signal must remain high or low for at least 2 system clock cycles to be recognized by the
Port I/O
hardware.
Crossbar
Figure 20.4. PCA Capture Mode Diagram
CEXn
W
P
M
1
6
n
x
PCA0CPMn
C
O
M
E
n
0
Rev. 1.4
C
A
P
P
n
C
A
P
N
n
0
1
M
A
T
n
0 0 0 x
O
G
T
n
W
P
M
n
C
C
E
F
n
0
1
C
F
C
R
PCA0CN
C
C
F
4
C
C
F
3
PCA
Timebase
C
C
F
2
C
C
F
1
PCA Interrupt
C
C
F
0
Capture
C8051F320/1
PCA0CPLn
PCA0L
PCA0CPHn
PCA0H
231
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