C8051F320-TB Silicon Laboratories Inc, C8051F320-TB Datasheet - Page 115
C8051F320-TB
Manufacturer Part Number
C8051F320-TB
Description
BOARD PROTOTYPING W/C8051F320
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F320-TB
Contents
Board
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F320
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bits7–3: Unused: Read = 00000b. Write = don’t care.
Bits2–0: PGSEL[2:0]: XRAM Page Select Bits.
User XRAM Space
(System Clock Domain)
R/W
Bit7
-
SFR Definition 12.1.
The XRAM Page Select Bits provide the high byte of the 16-bit external data memory
address when using an 8-bit MOVX command, effectively selecting a 256-byte page of
RAM. The upper 5-bits are "don't cares", so the 2k address blocks are repeated modulo over
the entire 64k external data memory address space.
R/W
Bit6
-
Figure 12.2. XRAM Memory Map Expanded View
0x03FF
0x0000
R/W
Bit5
-
(1024 bytes)
User XRAM
EMI0CN: External Memory Interface Control
R/W
Bit4
-
Rev. 1.4
R/W
Bit3
-
0x07FF
0x07C0
0x07BF
0x0740
0x073F
0x0640
0x063F
0x0440
0x043F
0x0400
PGSEL2
R/W
Bit2
(128 bytes)
(256 bytes)
(512 bytes)
Endpoint0
Endpoint1
Endpoint2
Endpoint3
(64 bytes)
(64 bytes)
Free
PGSEL1
R/W
Bit1
C8051F320/1
PGSEL0
USB FIFO Space
R/W
Bit0
(USB Clock Domain)
SFR Address:
00000000
Reset Value
0xAA
115
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