C8051F320-TB Silicon Laboratories Inc, C8051F320-TB Datasheet - Page 137
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C8051F320-TB
Manufacturer Part Number
C8051F320-TB
Description
BOARD PROTOTYPING W/C8051F320
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F320-TB
Contents
Board
Processor To Be Evaluated
C8051F320/F321
Interface Type
USB
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F320
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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Bits7–0: P3.[7:0]
Bits7–1: UNUSED. Read = 0000000b; Write = don’t care.
Bit0:
Bits7–1: UNUSED. Read = 0000000b; Write = don’t care.
Bit0:
P3.7
R/W
R/W
R/W
Bit7
Bit7
Bit7
-
-
Write - Output appears on I/O pins.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P3MDOUT.n bit = 0).
Read - Always reads ‘0’ if selected as analog input in register P3MDIN. Directly reads Port
pin when configured as digital input.
0: P3.n pin is logic low.
1: P3.n pin is logic high.
Analog Input Configuration Bit for P3.0.
Port pins configured as analog inputs have their weak pull-up, digital driver, and digital
receiver disabled.
0: Corresponding P3.n pin is configured as an analog input.
1: Corresponding P3.n pin is not configured as an analog input.
Output Configuration Bit for P3.0; ignored if corresponding bit in register P3MDIN is logic 0.
0: Corresponding P3.n Output is open-drain.
1: Corresponding P3.n Output is push-pull.
SFR Definition 14.17. P3MDOUT: Port3 Output Mode Register
SFR Definition 14.16. P3MDIN: Port3 Input Mode Register
P3.6
R/W
R/W
R/W
Bit6
Bit6
Bit6
-
-
SFR Definition 14.15. P3: Port3 Register
P3.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
-
-
P3.4
R/W
R/W
R/W
Bit4
Bit4
Bit4
-
-
Rev. 1.4
P3.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
-
-
P3.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
-
-
P3.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
-
-
C8051F320/1
(bit addressable)
P3.0
R/W
R/W
Bit0
R/W
Bit0
Bit0
SFR Address:
SFR Address:
SFR Address:
00000001
Reset Value
Reset Value
00000000
Reset Value
11111111
0xB0
0xF4
0xA7
137
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