EVAL-ADUC7023QSPZ1 Analog Devices Inc, EVAL-ADUC7023QSPZ1 Datasheet - Page 8
EVAL-ADUC7023QSPZ1
Manufacturer Part Number
EVAL-ADUC7023QSPZ1
Description
BOARD EVAL FOR ADUC7023
Manufacturer
Analog Devices Inc
Datasheet
1.EVAL-ADUC7023QSPZ.pdf
(96 pages)
Specifications of EVAL-ADUC7023QSPZ1
Silicon Manufacturer
Analog Devices
Core Architecture
ARM
Core Sub-architecture
ARM7TDMI
Silicon Core Number
ADuC7023
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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ADuC7023
TIMING SPECIFICATIONS
Table 2. I
Parameter
t
t
t
t
t
t
t
t
t
t
Table 3. I
Parameter
t
t
t
t
t
t
t
t
t
t
L
H
SHD
DSU
DHD
RSU
PSU
BUF
R
F
L
H
SHD
DSU
DHD
RSU
PSU
BUF
R
F
SDATA (I/O)
2
2
SCLK (I)
C Timing in Fast Mode (400 kHz)
C Timing in Standard Mode (100 kHz)
t
PSU
Description
SCLK low pulse width
SCLK high pulse width
Start condition hold time
Data setup time
Data hold time
Setup time for repeated start
Stop condition setup time
Bus-free time between a stop condition and a start condition
Rise time for both SCLK and SDATA
Fall time for both SCLK and SDATA
Description
SCLK low pulse width
SCLK high pulse width
Start condition hold time
Data setup time
Data hold time
Setup time for repeated start
Stop condition setup time
Bus-free time between a stop condition and a start condition
Rise time for both SCLK and SDATA
Fall time for both SCLK and SDATA
CONDITION
STOP
P
t
BUF
CONDITION
START
S
t
DSU
t
SHD
MSB
1
Figure 2. I
t
DHD
2–7
2
C-Compatible Interface Timing
Rev. B | Page 8 of 96
t
t
L
H
LSB
8
t
SUP
t
DSU
t
SUP
ACK
9
t
RSU
t
DHD
Min
200
100
300
100
0
100
100
1.3
REPEATED
START
S(R)
Slave
Max
300
300
4.0
4.7
4.0
Min
4.7
4.0
250
0
4.7
t
F
Slave
Typ
1360
1140
740
400
800
200
MSB
t
F
1
t
Master
R
Max
3.45
1
300
t
R
Unit
μs
ns
μs
ns
μs
μs
μs
μs
μs
ns
Unit
ns
ns
ns
ns
ns
ns
ns
μs
ns
ns
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