EA-OEM-315 Embedded Artists, EA-OEM-315 Datasheet - Page 51

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EA-OEM-315

Manufacturer Part Number
EA-OEM-315
Description
KIT LPC3141 SODIMM 66X48 200POS
Manufacturer
Embedded Artists
Type
MCUr
Datasheet

Specifications of EA-OEM-315

Contents
Board
For Use With/related Products
LPC3141
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
NXP Semiconductors
Table 18.
C
[1]
[2]
[3]
[4]
[5]
[6]
LPC3141_3143
Preliminary data sheet
Symbol
Common to read and write cycles
t
Read cycle parameters
t
t
t
t
t
t
t
t
t
t
t
t
Write cycle parameters
t
t
t
t
t
t
t
t
t
t
CSLAV
OELAV
BLSLAV
CSLOEL
CSLBLSL
OELOEH
BLSLBLSH
su(D)
h(D)
CSHOEH
CSHBLSH
OEHANV
BLSHANV
CSLDV
CSLWEL
CSLBLSL
WELDV
WELWEH
BLSLBLSH
WEHANV
WEHDNV
BLSHANV
BLSHDNV
L
= 25 pF, T
Refer to the LPC314x user manual for the programming of WAITOEN and HCLK.
Refer to the LPC314x user manual UM10362 for the programming of WAITRD and HCLK.
(WAITRD − WAITOEN + 1) = 3 min at 60 MHz.
Refer to the LPC314x user manual UM10362 for the programming of WAITWEN and HCLK.
Refer to the LPC314x user manual UM10362 for the programming of WAITWR and HCLK.
(WAITWD − WAITWEN + 1) = 3 min at 60 MHz.
Dynamic characteristics: static external memory interface
Parameter
CS LOW to address valid
time
OE LOW to address valid
time
BLS LOW to address valid
time
CS LOW to OE LOW time
CS LOW to BLS LOW time
OE LOW to OE HIGH time
BLS LOW to BLS HIGH time
data input set-up time
data input hold time
CS HIGH to OE HIGH time
CS HIGH to BLS HIGH time
OE HIGH to address invalid
time
BLS HIGH to address invalid
time
CS LOW to data valid time
CS LOW to WE LOW time
CS LOW to BLS LOW time
WE LOW to data valid time
WE LOW to WE HIGH time
BLS LOW to BLS HIGH time
WE HIGH to address invalid
time
WE HIGH to data invalid time
BLS HIGH to address invalid
time
BLS HIGH to data invalid
time
amb
=
9.2 SRAM controller
40
°
C to +85
°
C, unless otherwise specified; V
All information provided in this document is subject to legal disclaimers.
Conditions
Rev. 0.16 — 27 May 2010
[1][2][3]
[1][2][3]
[4][5][6]
[4][5]
[1]
[1]
[1]
[4]
[4]
[4]
Min
−1.8
-
-
-
-
-
-
9
-
3
-
10
-
-
-
-
-
-
-
-
-
-
-
DD(IO)
Typ
0
0 − WAITOEN × HCLK
0 − WAITOEN × HCLK
0 + WAITOEN × HCLK
0 + WAITOEN × HCLK
(WAITRD − WAITOEN + 1) × HCLK
(WAITRD − WAITOEN + 1) × HCLK
-
0
0
0
-
1 × HCLK
-
(WAITWEN + 1) × HCLK
WAITWEN × HCLK
0 − (WAITWEN + 1) × HCLK
(WAITWR − WAITWEN + 1) × HCLK
(WAITWR − WAITWEN + 3) × HCLK
1 × HCLK
1 × HCLK
1 × HCLK
1 × HCLK
= 1.8 V and 3.3 V (SUP8).
LPC3141/3143
© NXP B.V. 2010. All rights reserved.
Max
4
-
-
-
-
-
-
-
-
-
-
-
-
9
-
-
-
-
-
-
-
-
-
51 of 74
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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