EA-OEM-315 Embedded Artists, EA-OEM-315 Datasheet - Page 24

• Manufacturer Part Number: EA-OEM-315
• Description: KIT LPC3141 SODIMM 66X48 200POS
• Manufacturer: Embedded Artists
• Type: MCUr

Specifications of EA-OEM-315

• Contents: Board
• For Use With/related Products: LPC3141
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

NXP Semiconductors
LPC3141_3143
Preliminary data sheet
6.14 APB bridge
This module has the following features:
The APB bridge is a bus bridge between AMBA Advanced High-performance Bus (AHB)
and the ARM Peripheral Bus (APB) interface.
The module supports two different architectures:
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Supports all combinations of 32-bit masters and slaves (fully connected interconnect
matrix).
Round-Robin priority mechanism for bus arbitration: all masters have the same
priority and get bus access in their natural order.
Four devices on a master port (listed in their natural order for bus arbitration):
– DMA
– ARM926 instruction port
– ARM926 data port
– USB OTG
Devices on a slave port (some ports are shared between multiple devices):
– AHB to APB bridge 0
– AHB to APB bridge 1
– AHB to APB bridge 2
– AHB to APB bridge 3
– AHB to APB bridge 4
– Interrupt controller
– NAND flash controller
– MCI SD/SDIO
– USB 2.0 HS OTG
– 96 kB ISRAM
– 96 kB ISRAM
– 128 kB ROM
– MPMC (Multi-Purpose Memory Controller)
Single-clock architecture, synchronous bridge. The same clock is used at the AHB
side and at the APB side of the bridge. The AHB-to-APB4 bridge uses this
architecture.
Dual-clock architecture, asynchronous bridge. Different clocks are used at the AHB
side and at the APB side of the bridge. The AHB-to-APB0, AHB-to-APB1,
AHB-to-APB2, and AHB-to-APB3 bridges use this architecture.
All information provided in this document is subject to legal disclaimers.
Rev. 0.16 — 27 May 2010
LPC3141/3143
© NXP B.V. 2010. All rights reserved.
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