C8051F060DK Silicon Laboratories Inc, C8051F060DK Datasheet - Page 56
![DEV KIT FOR F060/F062/F063](/photos/9/23/92355/c8051f060dk_sml.jpg)
C8051F060DK
Manufacturer Part Number
C8051F060DK
Description
DEV KIT FOR F060/F062/F063
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet
1.C8051F060-TB.pdf
(328 pages)
Specifications of C8051F060DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F06x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F060
Silicon Family Name
C8051F06x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051060, C8051F062 and C8051F063
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1214
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F060DK
Manufacturer:
Silicon Labs
Quantity:
135
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C8051F060/1/2/3/4/5/6/7
5.3.3. Settling Time Requirements
The ADC requires a minimum tracking time before an accurate conversion can be performed. This tracking
time is determined by the ADC input resistance, the ADC sampling capacitance, any external source resis-
tance, and the accuracy required for the conversion. Figure 5.5 shows the equivalent ADC input circuits for
both Differential and Single-ended modes. Notice that the equivalent time constant for both input circuits is
the same. The required settling time for a given settling accuracy (SA) may be approximated by
Equation 5.1. An absolute minimum tracking time of 280 ns is required prior to the start of a conversion.
Where:
SA is the settling accuracy, given as a fraction of an LSB (for example, 0.25 to settle within 1/4 LSB)
t is the required settling time in seconds
R
n is the ADC resolution in bits (16).
56
TOTAL
AIN0
AIN1
is the sum of the ADC input resistance and any external source resistance.
RC
Differential Mode
Input
= R
AIN
R
R
* C
AIN
AIN
SAMPLE
= 30
= 30
Figure 5.5. ADC0 and ADC1 Equivalent Input Circuits
Equation 5.1. ADC0 Settling Time Requirements
t
C
C
SAMPLE
SAMPLE
=
ln
= 80pF
= 80pF
------ -
SA
2
n
Rev. 1.2
R
TOTAL
AIN0
AIN1
C
or
SAMPLE
Single-Ended Mode
RC
Input
= R
AIN
R
* C
AIN
SAMPLE
= 30
C
SAMPLE
= 80pF
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