DEMO9S12XEP100 Freescale Semiconductor, DEMO9S12XEP100 Datasheet - Page 146

• Manufacturer Part Number: DEMO9S12XEP100
• Description: BOARD DEMO FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of DEMO9S12XEP100

• Contents: Board, Cables, CD
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Anytime.
1. Read: Anytime.
Chapter 2 Port Integration Module (S12XEPIMV1)
2.3.52
2.3.53
146
Function
Address 0x025F
Address 0x0260
Write: Anytime.
Write: Anytime.
Altern.
Field
PIFP
Reset
Reset
7-0
W
W
R
R
Port P interrupt flag—
Each flag is set by an active edge on the associated input pin. This could be a rising or a falling edge based on the
state of the PPSP register. To clear this flag, write logic level 1 to the corresponding bit in the PIFP register. Writing
a 0 has no effect.
1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set).
0 No active edge pending.
PIFP7
PTH7
TXD5
Port P Interrupt Flag Register (PIFP)
Port H Data Register (PTH)
SS2
0
0
7
7
PIFP6
SCK2
RXD5
PTH6
0
0
6
6
Figure 2-50. Port P Interrupt Flag Register (PIFP)
Table 2-48. PPSP Register Field Descriptions
MC9S12XE-Family Reference Manual , Rev. 1.23
Figure 2-51. Port H Data Register (PTH)
MOSI2
PIFP5
PTH5
TXD4
0
0
5
5
MISO2
PIFP4
RXD4
PTH4
0
0
4
4
Description
PIFP3
PTH3
TXD7
SS1
3
0
3
0
PIFP2
RXD7
PTH2
SCK1
0
0
2
2
Access: User read/write
Access: User read/write
Freescale Semiconductor
MOSI1
PIFP1
PTH1
TXD6
0
0
1
1
MISO1
PIFP0
RXD6
PTH0
0
0
0
0
(1)
(1)