CT-161-CD Fujitsu Semiconductor America Inc, CT-161-CD Datasheet - Page 50

• Manufacturer Part Number: CT-161-CD
• Description: KIT 16LX FOR MB90F387
• Manufacturer: Fujitsu Semiconductor America Inc
• Series: F²MC-16LXr
• Type: MCUr

Specifications of CT-161-CD

• Contents: Board, Cable, CD
• For Use With/related Products: MB90F387S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 865-1103

50
MB90385 Series
11. UART Outline
UART functions
Note : Start/stop bit is not added upon clock-synchronous transmission. Data only is transmitted.
UART operation modes
*1 : “+1” is an address/data selection bit used for communication control (bit 11 of SCR1 register: A/D).
*2 : Only 1 bit is detected as a stop bit on data reception.
(asynchronous, multi-processor mode)
0
1
2
Master/slave communication function
UART is a general-purpose serial data communication interface for synchronous and asynchronous communi-
cation using external devices.
• Provided with bi-directional communication function for both clock-synchronous and clock-asynchronous
• Provided with master/slave communication function (multi-processor mode). (Only master side is available.)
• Interrupt request is generated upon completion of reception, completion of transmission and detection of
• Ready for expanded intelligent service, EI
: Disallowed
modes.
reception error.
Operation mode
Multi processor mode
Asynchronous mode
Reception error detection
Synchronous mode
(normal mode)
Transmission mode
Signaling system
Interrupt request
Data length
Data buffer
Baud rate
With parity
8+1*
8
1
Full-duplex double buffer
Clock synchronous (No start/stop bit, no parity bit)
Clock asynchronous (start-stop synchronous)
Built-in special-purpose baud-rate generator. Setting is selectable
among 8 values.
Input of external values is allowed.
Use of clock from external timer (16-bit reload timer 0) is allowed.
7 bits (only asynchronous normal mode)
8 bits
Non Return to Zero (NRZ) system
Framing error
Overrun error
Parity error (not detectable in operation mode 1 (multi-processor
mode))
Receive interrupt (reception completed, reception error detected)
Transmission interrupt (transmission completed)
Ready for expanded intelligent I/O service (EI
sion and reception
Communication between 1 (master) and n (slaves) are available
(usable as master only).
Data length
7-bit or 8-bit
2
OS.
Without parity
Description
Synchronization
Asynchronous
Asynchronous
Synchronous
2
OS) in both transmis-
Stop bit length
1- bit or 2-bit *
No
2