ADC1415S125/DB,598 NXP Semiconductors, ADC1415S125/DB,598 Datasheet - Page 31

BOARD DEMO FOR ADC1415S125

ADC1415S125/DB,598

Manufacturer Part Number
ADC1415S125/DB,598
Description
BOARD DEMO FOR ADC1415S125
Manufacturer
NXP Semiconductors
Type
A/Dr

Specifications of ADC1415S125/DB,598

Number Of Adc's
1
Number Of Bits
14
Sampling Rate (per Second)
125M
Data Interface
Serial, SPI™
Inputs Per Adc
1 Differential
Input Range
1 ~ 2 Vpp
Power (typ) @ Conditions
840mW @ 125Msps
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Utilized Ic / Part
ADC1415S125
Product
Data Conversion Development Tools
Conversion Rate
125 MSPS
Resolution
14 bit
Interface Type
SMA
For Use With/related Products
ADC1415S125
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5094
Table 18.
Add
Hex
0005 Reset and
0006 Clock
0008 Internal reference R/W
0010 Input buffer
0011 Output data
0012 Output clock
0013 Offset
0014 Test pattern 1
0015 Test pattern 2
0016 Test pattern 3
0017 Fast OTR
0020 CMOS output
0021 LVDS DDR O/P 1 R/W
0022 LVDS DDR O/P 2 R/W
Register name
operating mode
standard.
Register allocation map
11.6.3 Register allocation map
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bit definition
Bit 7
SW_RST
-
-
-
-
-
-
-
-
-
-
-
Bit 6
-
-
-
-
-
-
-
-
-
-
-
Bit 5
-
-
-
-
-
-
-
DAVI_x2_
EN
-
RESERVED[2:0]
-
TESTPAT_USER[5:0]
Bit 4
SE_SEL
-
LVDS_
CMOS
-
-
-
-
-
-
DAVI[1:0]
TESTPAT_USER[13:6]
Bit 3
-
DIFF_SE
INTREF_EN
OUTBUF
DAVINV
-
FASTOTR
BIT_BYTE_
WISE
-
DIG_OFFSET[5:0]
DAV_DRV[1:0]
Bit 2
-
-
-
OUTBUS_SWAP
DATAI_x2_EN
LVDS_INT_TER[2:0]
FASTOTR_DET[2:0]
TESTPAT_SEL[2:0]
DAVPHASE[2:0]
INTREF[2:0]
Bit 1
CLKDIV
-
IB_IBIAS[1:0]
DATA_FORMAT[1:0]
DATA_DRV[1:0]
OP_MODE[1:0]
DATAI[1:0]
Bit 0
DCS_EN
-
Default
Bin
0000 0000
0000 0001
0000 0000
0000 0011
0000 0000
0000 1110
0000 0000
0000 0000
0000 0000
0000 0000
0000 0000
0000 1110
0000 0000
0000 0000

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