TMP86C993XB Toshiba, TMP86C993XB Datasheet - Page 51

• Manufacturer Part Number: TMP86C993XB
• Description: EMULATION CHIP FOR TMP86F SSOP
• Manufacturer: Toshiba

Specifications of TMP86C993XB

• Accessory Type: Adapter
• For Use With/related Products: TMP86F SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Example 1 :Enables interrupts individually and sets IMF
Example 2 :C compiler description example
Interrupt Latches
3.2.2
(003DH, 003CH)
(003EH)
ILH,ILL
ILE
Note 1: To clear any one of bits IL7 to IL4, be sure to write "1" into IL2 and IL3.
The IMF is normally set and cleared by [EI] and [DI] instruction respectively. During reset, the IMF is initialized
to “0”.
bit of an individual interrupt enable flag to “1” enables acceptance of its interrupt, and setting the bit to “0”
disables acceptance. During reset, all the individual interrupt enable flags (EF21 to EF4) are initialized to “0”
and all maskable interrupts are not accepted until they are set to “1”.
Individual interrupt enable flags (EF21 to EF4)
The IMF is located on bit0 in EIRL (Address: 003AH in SFR), and can be read and written by an instruction.
Each of these flags enables and disables the acceptance of its maskable interrupt. Setting the corresponding
Note:In main program, before manipulating the interrupt enable flag (EF) or the interrupt latch (IL), be sure to
IL15
15
clear IMF to "0" (Disable interrupt by DI instruction). Then set IMF newly again as required after operating
on the EF or IL (Enable interrupt by EI instruction)
In interrupt service routine, because the IMF becomes "0" automatically, clearing IMF need not execute
normally on interrupt service routine. However, if using multiple interrupt on interrupt service routine,
manipulating EF or IL should be executed before setting IMF="1".
IL14
DI
LDW
:
:
EI
unsigned int _io (3AH) EIRL;
_DI();
EIRL = 10100000B;
:
_EI();
IL21 to IL2
14
IL13
13
IL12
ILH (003DH)
(EIRL), 1110100010100000B
12
Interrupt latches
IL11
11
IL10
10
Page 37
IL9
9
at RD
0: No interrupt request
1: Interrupt request
IL8
8
/* 3AH shows EIRL address */
; IMF ← 0
; EF15 to EF13, EF11, EF7, EF5 ← 1
Note: IMF should not be set.
; IMF ← 1
IL7
−
7
7
IL6
6
6
−
IL21
IL5
5
5
at WR
0: Clears the interrupt request
1: (Interrupt latch is not set.)
IL20
ILL (003CH)
ILE (003EH)
IL4
4
4
(Initial value: 00000000 000000**)
IL19
IL3
3
3
TMP86FH92DMG
(Initial value: **000000)
IL18
IL2
2
2
IL17
1
1
IL16
0
0
R/W