MT18VDDT12872Y-265D2 Micron Technology Inc, MT18VDDT12872Y-265D2 Datasheet - Page 27
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MT18VDDT12872Y-265D2
Manufacturer Part Number
MT18VDDT12872Y-265D2
Description
MODULE SDRAM DDR 1GB 184DIMM
Manufacturer
Micron Technology Inc
Datasheet
1.MT18VDDT12872Y-265D2.pdf
(39 pages)
Specifications of MT18VDDT12872Y-265D2
Memory Type
DDR SDRAM
Memory Size
1GB
Speed
266MT/s
Package / Case
184-DIMM
Main Category
DRAM Module
Sub-category
DDR SDRAM
Module Type
184RDIMM
Device Core Size
72b
Organization
128Mx72
Total Density
1GByte
Chip Density
512Mb
Access Time (max)
750ps
Maximum Clock Rate
266MHz
Operating Supply Voltage (typ)
2.5V
Operating Current
2.61A
Number Of Elements
18
Operating Supply Voltage (max)
2.7V
Operating Supply Voltage (min)
2.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Pin Count
184
Mounting
Socket
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Table 17: Register Timing Requirements and Switching Characteristics
Note: 1
NOTE:
pdf: 09005aef808a331f, source: 09005aef80858037
DD18C32_64_128_256x72G.fm - Rev. E 9/04 EN
1. The timing and switching specifications for the register listed above are critical for proper operation of the DDR SDRAM
2. Data inputs must be low a minimum time of t
3. Data and clock inputs must be held at valid levels (not floating) a minimum time of t
4. For data signal input slew rate
5. For data signal input slew rate
6. CK, CK# signals input slew rate
JESD82-3 or
pattern) by
REGISTER
JESD82-4
SSTL (bit
Registered DIMMs. These are meant to be a subset of the parameters for the specific device used on the module.
Detailed information for this register is available in JEDEC Standard JESD82.
LOW.
SYMBOL
f
t
clock
t
t
t
inact
t
t
t
PHL
act
pd
su
w
h
Setup Time, Slow Slew Rate
Differential Inputs Inactive
Setup Time, Fast Slew Rate
Hold Time, Slow Slew Rate
Hold Time, Fast Slew Rate
Differential Inputs Active
Clock to Output Time
Reset to Output Time
Clock Frequency
PARAMERTER
Pulse Duration
1 V/ns.
0.5 V/ns and
1V/ns.
Time
Time
act
1V/ns.
max, after RESET# is taken HIGH.
256MB, 512MB, 1GB, 2GB (x72, ECC, SR)
30pF to GND and
CK, CK# HIGH or
HIGH, CK# LOW
HIGH, CK# LOW
Data Before CK
Data After CK
27
CONDITION
50 to V
LOW
TT
Micron Technology, Inc., reserves the right to change products or specifications without notice.
184-PIN DDR SDRAM RDIMM
V
0°C
DD
MIN
0.75
0.75
1.1
2.5
0.9
0.9
-
-
-
-
= +2.5V ±0.2V
T
A
inact
+70°C
MAX
max, after RESET# is taken
200
2.8
22
22
5
-
-
-
-
-
©2004 Micron Technology, Inc. All rights reserved.
UNITS
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
4, 6
5, 6
4, 6
5, 6
2
3