MT16LSDF6464HG-133D2 Micron Technology Inc, MT16LSDF6464HG-133D2 Datasheet - Page 12

• Manufacturer Part Number: MT16LSDF6464HG-133D2
• Description: MODULE SDRAM 512MB 144SODIMM
• Manufacturer: Micron Technology Inc

Specifications of MT16LSDF6464HG-133D2

• Memory Type: SDRAM
• Memory Size: 512MB
• Speed: 133MHz
• Package / Case: 144-SODIMM
• Main Category: DRAM Module
• Sub-category: SDRAM
• Module Type: 144SODIMM
• Device Core Size: 64b
• Organization: 64Mx64
• Total Density: 512MByte
• Chip Density: 256Mb
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Current: 1.096A
• Number Of Elements: 16
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 144
• Mounting: Socket
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

CAPACITANCE
(Note 2; notes appear following parameter tables)
ELECTRICAL CHARACTERISTICS AND RECOMMENDED
AC OPERATING CONDITIONS
(Notes: 5, 6, 8, 9, 11, 31; notes appear following the parameter tables) (V
32/64 Meg x 64 SDRAM SODIMM
SD16C32_64x64HG_A.pm6; Rev. A, Pub 7/01
AC CHARACTERISTICS
PARAMETER
Access time from
CLK (pos. edge)
Address hold time
Address setup time
CLK high-level width
CLK low-level width
Clock cycle time
CKE hold time
CKE setup time
CS#, RAS#, CAS#, WE#, DQM hold time
CS#, RAS#, CAS#, WE#, DQM setup time
Data-in hold time
Data-in setup time
Data-out high-impedance
time
Data-out low-impedance time
Data-out hold time (load)
Data-out hold time (no load)
ACTIVE to PRECHARGE command
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
Refresh period (8,192 rows)
AUTO REFRESH period
PRECHARGE command period
ACTIVE bank a to ACTIVE bank b command
Transition time
WRITE recovery time
Exit SELF REFRESH to ACTIVE command
PARAMETER
Input Capacitance: A0-A12, BA0, BA1, RAS#,
CAS#, WE#
Input Capacitance: CK0-CK3
Input Capacitance: S0#-S3#
Input Capacitance: CKE0, CKE1
Input Capacitance: DQMB0-DQMB7
Input/Output Capacitance: SCL, SA0-SA2, SDA
Input/Output Capacitance: DQ0-DQ63
CL = 3
CL = 2
CL = 3
CL = 2
CL = 3
CL = 2
SYMBOL
t
t
t
t
t
t
t
t
t
AC(3)
AC(2)
CK(3)
CK(2)
t
t
HZ(3)
HZ(2)
t
t
t
t
t
t
CMH
t
CMS
t
OH
t
t
t
CKH
t
t
RCD
RRD
t
CKS
t
RAS
t
t
XSR
REF
RFC
WR
AH
DH
OH
CH
AS
DS
RC
RP
t
CL
LZ
T
N
1 CLK +
MIN
7ns
0.8
1.5
2.5
2.5
7.5
0.8
1.5
0.8
1.5
0.8
1.5
1.8
0.3
37
60
15
66
15
14
14
67
7
1
3
12
-13E
120,000
MAX
5.4
5.4
5.4
5.4
1.2
64
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1 CLK +
7.5ns
MIN
0.8
1.5
2.5
2.5
7.5
0.8
1.5
0.8
1.5
0.8
1.5
1.8
0.3
10
44
66
20
66
20
15
15
75
1
3
-133
DD
120,000
MAX
, V
5.4
5.4
1.2
64
6
6
DD
SYMBOL MIN
Q = +3.3V ±0.3V)
1 CLK +
MIN
C
C
C
C
C
C
C
SDRAM SODIMM
7ns
1.8
0.3
10
50
70
20
70
20
20
15
80
256/512MB (x64)
1
2
3
3
8
1
2
1
2
1
2
1
3
IO
I
I
I
I
I
I
1
2
3
4
5
6
-10E
120,000
MAX
13.3
1.2
64
40
10
20
6
6
6
6
5
–
8
PRELIMINARY
©2001, Micron Technology, Inc.
MAX UNITS
UNITS
60.8
17.3
15.2
30.4
7.6
10
12
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
p F
p F
p F
p F
p F
p F
p F
27
23
23
10
10
28
32
24
25
20
7