MAX1329BETL+ Maxim Integrated Products, MAX1329BETL+ Datasheet - Page 48

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MAX1329BETL+

Manufacturer Part Number
MAX1329BETL+
Description
IC DAS 12BIT 300KSPS 40-TQFN-EP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1329BETL+

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
The ADC LT Alarm register contains the less-than
mode, trip count, and threshold settings. Writing the
register address resets the trip counters to zero. The LT
alarm is functional for the normal, fast power-down, and
burst modes.
LTAM: ADC Less-Than Alarm Mode bit (default = 0).
LTAM = 0 means that the alarm trips need not be con-
secutive to cause the LTA Status bit to be set. LTAM = 1
means that the alarm trips must be consecutive before
the LTA Status bit is set.
LTAC<2:0>: ADC Less-Than Alarm Trip Count bits
(default = 000). LTAC<2:0> set the number of conver-
sion results needed to be less than the alarm threshold
before the LTA Status bit is set.
48
NAME
DEFAULT
NAME
DEFAULT
______________________________________________________________________________________
LTAT7
LTAM
MSB
0
0
LTAC2
LTAT6
0
0
ADC LT Alarm Register
LTAC1
LTAT5
0
0
LTAC0
LTAT4
0
0
LTAT<11:0>: ADC Less-Than Alarm Threshold bits
(default = 0x000). When the required number of ADC
conversions results less than the threshold set by the
LTAT<11:0> bits have been completed, the LTA Status
bit is set in the Status register. Clearing the LTA Status
bit by reading the Status register or writing to the ADC LT
Alarm register restarts the trip count. The LTAT<11:0>
bits are in binary format when the ADC is in unipolar
mode and two’s complement format when the ADC is in
bipolar mode. Disable the LT alarm by setting
LTAT<11:0> to 0x000 when the ADC is in unipolar mode
and 0x800 when the ADC is in bipolar mode.
Table 13b. ADC Less-Than Alarm Trip
Count Bit Configuration
LTAC2
0
0
0
0
1
1
1
1
LTAT11
LTAT3
0
0
LTAC1
0
0
1
1
0
0
1
1
LTAT10
LTAT2
0
0
LTAC0
0
1
0
1
0
1
0
1
LTAT9
LTAT1
0
0
NUMBER OF TRIPS
1
2
3
4
5
6
7
8
LTAT8
LTAT0
LSB
0
0

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