E-L6919ETR STMicroelectronics, E-L6919ETR Datasheet - Page 6

• Manufacturer Part Number: E-L6919ETR
• Description: IC CTRLR 5BIT PROG 2PHASE 28SOIC
• Manufacturer: STMicroelectronics
• Type: Step-Down (Buck)r

Specifications of E-L6919ETR

• Internal Switch(s): No
• Synchronous Rectifier: Yes
• Number Of Outputs: 1
• Voltage - Output: 0.8 ~ 1.55 V
• Current - Output: 2A
• Frequency - Switching: 150kHz
• Voltage - Input: 5 ~ 12 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Power - Output: 2W
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 6.5 V
• Maximum Operating Temperature: 85 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-4592-2

L6919E
PIN FUNCTION
6/33
10
11
12
13
14
15
16
N
1
2
3
4
5
6
7
8
9
PGNDS1
PGNDS2
PHASE1
UGATE1
LGATE1
VCCDR
BOOT1
COMP
ISEN1
ISEN2
Name
VSEN
GND
VCC
FBR
FBG
FB
Channel 1 LS driver output.
A little series resistor helps in reducing device-dissipated power.
LS drivers supply: it can be varied from 5V to 12V buses.
Filter locally with at least 1 F ceramic cap vs. PGND.
Channel 1 HS driver return path. It must be connected to the HS1 mosfet source and provides
the return path for the HS driver of channel 1.
Channel 1 HS driver output.
A little series resistor helps in reducing device-dissipated power.
Channel 1 HS driver supply. This pin supplies the relative high side driver.
Connect through a capacitor (100nF typ.) to the PHASE1 pin and through a diode to VCC
(cathode vs. boot).
Device supply voltage. The operative supply voltage is 12V ±10%.
Filter with 1 F (Typ.) capacitor vs. GND.
All the internal references are referred to this pin. Connect it to the PCB signal ground.
This pin is connected to the error amplifier output and is used to compensate the control
feedback loop.
This pin is connected to the error amplifier inverting input and is used to compensate the
voltage control feedback loop.
A current proportional to the sum of the current sensed in both channel is sourced from this pin
(50 A at full load, 70 A at the Constant Current threshold). Connecting a resistor between this
pin and VSEN pin allows programming the droop effect.
Manages Over&Under-voltage conditions and the PGOOD signal. It is internally connected with
the output of the Remote Sense Buffer for Remote Sense of the regulated voltage.
If no Remote Sense is implemented, connect it directly to the regulated voltage in order to
manage OVP, UVP and PGOOD.
Connecting 1nF capacitor max vs. SGND can help in reducing noise injection.
Remote sense buffer non-inverting input. It has to be connected to the positive side of the load
to perform a remote sense.
If no remote sense is implemented, connect directly to the output voltage (in this case connect
also the VSEN pin directly to the output regulated voltage).
Remote sense buffer inverting input. It has to be connected to the negative side of the load to
perform a remote sense.
Pull-down to ground if no remote sense is implemented.
Channel 1 current sense pin. The output current may be sensed across a sense resistor or
across the low-side mosfet R
to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as possible to the
PGNDS net in order to couple in common mode any picked-up noise.
Channel 1 Power Ground sense pin. The net connecting the pin to the sense point must be
routed as close as possible to the ISEN1 net in order to couple in common mode any picked-up
noise.
Channel 2 Power Ground sense pin. The net connecting the pin to the sense point must be
routed as close as possible to the ISEN2 net in order to couple in common mode any picked-up
noise.
Channel 2 current sense pin. The output current may be sensed across a sense resistor or
across the low-side mosfet R
to the sense resistor through a resistor Rg.
The net connecting the pin to the sense point must be routed as close as possible to the
PGNDS net in order to couple in common mode any picked-up noise.
dsON.
dsON.
This pin has to be connected to the low-side mosfet drain or
This pin has to be connected to the low-side mosfet drain or
Description