LT3695EMSE#PBF Linear Technology, LT3695EMSE#PBF Datasheet - Page 20

IC SWIT REG BUCK 1A ADJ 16MSOP

LT3695EMSE#PBF

Manufacturer Part Number
LT3695EMSE#PBF
Description
IC SWIT REG BUCK 1A ADJ 16MSOP
Manufacturer
Linear Technology
Type
Step-Down (Buck)r
Datasheet

Specifications of LT3695EMSE#PBF

Internal Switch(s)
Yes
Synchronous Rectifier
No
Number Of Outputs
1
Voltage - Output
0.8 ~ 20 V
Current - Output
1A
Frequency - Switching
250kHz ~ 2.2MHz
Voltage - Input
3.6 ~ 36 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
16-MSOP Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power - Output
-

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APPLICATIONS INFORMATION
LT3695 Series
This reduces the minimum input voltage to approximately
300mV above V
current is continuous and the duty cycle is limited by the
maximum duty cycle of the LT3695 regulators, requiring
a higher input voltage to maintain regulation.
Soft-Start
The RUN/SS pin can be used to soft-start the LT3695
regulators, reducing the maximum input current during
start-up. The RUN/SS pin is driven through an external
RC network to create a voltage ramp at this pin. Figure 6
shows the start-up and shutdown waveforms with the
soft-start circuit. By choosing a large RC time constant,
the peak start-up current can be reduced to the current
that is required to regulate the output, with no overshoot.
Choose the value of the resistor so that it can supply 7.5μA
when the RUN/SS pin reaches 2.5V. For fault tolerant ap-
plications, see the discussion of the RUN/SS resistor in
the Fault Tolerance section.
Synchronization
To select low ripple Burst Mode operation, tie the SYNC
pin below 0.3V (this can be ground or a logic output).
Synchronizing the oscillator of the LT3695 regulators to
an external frequency can be done by connecting a square
wave (with 20% to 80% duty cycle) to the SYNC pin. The
square wave amplitude should have valleys that are below
0.3V and peaks that are above 0.8V (up to 6V).
The LT3695 regulators will not enter Burst Mode operation
at low output loads while synchronized to an external clock,
but instead will skip pulses to maintain regulation.
0.22μF
20
RUN
15k
Figure 6. To Soft-Start the LT3695 Regulators,
Add a Resistor and Capacitor to the RUN/SS Pin
RUN/SS
GND
OUT
. At higher load currents, the inductor
V
1A/DIV
5V/DIV
RUN/SS
5V/DIV
5V/DIV
V
V
RUN
OUT
I
L
5ms/DIV
3695 F05
The maximum load current that the part can supply is
reduced when a clock signal is applied to SYNC.
The LT3695 regulators may be synchronized over a 300kHz
to 2.2MHz range. The R
the LT3695 regulators switching frequency 20% below the
lowest synchronization input. For example, if the synchro-
nization signal is 360kHz, the R
300kHz. To assure reliable and safe operation the LT3695
regulators will only synchronize when the output voltage is
near regulation as indicated by the PG fl ag. It is therefore
necessary to choose a large enough inductor value to
supply the required output current at the frequency set
by the R
more information. It is also important to note that slope
compensation is set by the R
oscillations, calculate the minimum inductor value using
the frequency determined by R
Shorted and Reversed Input Protection
If the inductor is chosen so that it will not saturate exces-
sively, the LT3695 regulators will tolerate a shorted output.
When operating in short-circuit condition, the LT3695
regulators will reduce their frequency until the valley cur-
rent is at a typical value of 1.6A (see Figure 7). There is
another situation to consider in systems where the output
will be held high when the input to the LT3695 regulators is
absent. This may occur in battery charging applications or
in battery backup systems where a battery or some other
supply is diode ORed with the LT3695 regulators’ output.
If the V
high (either by a logic signal or because it is tied to V
Figure 7. The LT3695 Regulators Reduce Their Frequency
to Protect Against Shorted Output with 36V Input
500mA/DIV
IN
20V/DIV
T
pin is allowed to fl oat and the RUN/SS pin is held
resistor. See the Inductor Selection section for
V
SW
0A
I
L
T
resistor should be chosen to set
2μs/DIV
T
value; to avoid subharmonic
T
.
T
should be chosen for
3695 F07
0V
3695fa
IN
),

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