L6701TR STMicroelectronics, L6701TR Datasheet

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... Applications HIGH CURRENT VRM / VRD FOR DESKTOP / SERVER/ WORKSTATION CPUs HIGH DENSITY CONVERTERS Order codes Part number L6701 L6701TR December 2005 PowerSSO-36 Description L6701 is an extremely simple, low-cost solution to implement a three phase step-down controller with integrated high-current drivers in a compact PowerSSO-36 package with exposed pad. ...

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Contents 1 Device Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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L6701 11 Dynamic VID Transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Device Description 1 Device Description L6701 is multi-phase PWM controller with embedded high-current drivers that provides complete control logic and protections for a high-performance step-down DC-DC voltage regulator, optimized for advanced microprocessor power supply. Multi-phase buck is the simplest ...

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L6701 2 Pins description and connection diagrams Figure 1. Pins connection (Top view) 2.1 Pin description Table 1. Pins description ° Pin n Name 1 SGND 2 VCC 3 LGATE1 4 PGND 5 LGATE2 6 LGATE3 7 BOOT1 8 UGATE1 ...

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Pins description and connection diagrams Table 1. Pins description (continued) ° Pin n Name 10 BOOT2 11 UGATE2 12 PHASE2 13 BOOT3 14 UGATE3 15 PHASE3 SSEND / 16 PGOOD 17 DAC_SEL OSC / FAULT 6/44 ...

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L6701 Table 1. Pins description (continued) ° Pin n Name 19 REF_IN 20 REF_OUT VID4 VID0, VID5 27 FBR 28 FBG ISEN3 ISEN1 32 CS+ 33 CS- 34 VSEN ...

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Maximum Ratings 3 Maximum Ratings 3.1 Absolute maximum ratings Table 2. Absolute Maximum Ratings Symbol Parameter V to PGND Boot Voltage BOOTx PHASEx UGATEx PHASEx LGATEx, PHASEx, to PGNDx VID0 to VID5 ...

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L6701 4 Electrical specifications 4.1 Electrical characteristics Table 4. Electrical Characteristics (V = 12V±15 Symbol Parameter Supply Current and Power-ON I VCC Supply current CC I BOOTx Supply Current BOOTx V Turn-ON CC UVLO VCC V Turn-OFF CC ...

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Electrical specifications Table 4. Electrical Characteristics (continued 12V±15 Symbol Parameter Error Amplifier and Remote Buffer Gain 0 SR Slew Rate RB DC Gain Remote Buffer Common CMRR Mode Rejection Ratio Differential Current ...

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L6701 5 Typical application circuit and block diagram 5.1 Application circuit Figure 2. Typical application circuit GND VCC IN 4 PGND 1 SGND 17 DAC_SEL 18 OSC/EN/FAULT 26 VID5 21 VID4 22 VID3 23 VID2 24 VID1 ...

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Typical application circuit and block diagram Figure 3. Typical Application Circuit: Fully Differential Current Sense (Pat.Pend GND VCC IN 4 PGND 1 SGND 17 DAC_SEL 18 OSC/EN/FAULT 26 VID5 21 VID4 22 VID3 23 VID2 ...

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L6701 5.2 Block diagram Figure 4. Block diagram VCC VCC PGND HS1 PGND SGND SGND CROSS CONDUCTION OSC / EN / FAULT DIGITAL VCC SOFT START OSC/EN/FAULT DAC_SEL VID0 VID1 VID2 I OS VID3 VID4 VID5 DAC_SEL VCC PGND VCC ...

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VID Tables 6 VID Tables Table 5. Voltage IDentification (VID) for Intel VR10 VID4 VID3 VID2 VID1 VID0 VID5 ...

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L6701 Table 5. Voltage IDentification (VID) for Intel VR10 VID4 VID3 VID2 VID1 VID0 VID5 Since the VIDx pins program the maximum output voltage, according to VR10.x specifications, the ...

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VID Tables Table 7. Voltage IDentification (VID) for AMD Hammer DAC VID5 VID4 VID3 VID2 VID1 VID0 ...

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L6701 7 Configuring the Device: DAC Selection Multiple DACs need to be configured before the system start-up by programming the apposite pin DAC_SEL. The embedded DAC allows to regulate the output voltage with a tolerance of ±0.7% recovering from offsets ...

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Driver Section 8 Driver Section The integrated high-current drivers allow using different types of power MOS (also multiple MOS to reduce the equivalent R The drivers for the high-side MOSFETs use BOOTx pins for supply and PHASEx pins for ...

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L6701 Figure 5. Dissipated Power 8 Driver Section 19/44 ...

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Current Sharing Loop and Current Reading 9 Current Sharing Loop and Current Reading 9.1 Current Sharing Loop L6701 embeds two separate Current Reading circuitries used to perform Current Sharing and OCP through ISENx pins and Voltage Positioning (Droop Function) ...

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L6701 10 Output Voltage Positioning Output voltage positioning is performed by selecting the reference DAC and by programming the Droop Function and Offset to the reference (See from the FB pin, directly proportional to the read current, causes the output ...

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Output Voltage Positioning The device forces I DROOP R implementing the load regulation dependence. The output characteristic vs. load current is FB then given by (Offset disabled): V VID Where R is the resulting load-line ...

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L6701 and, multiplied by three, sourced by the FB pin (I the desired load-line slope. As before, the voltage positioning equations results (See As a consequence: The device forces I DROOP R implementing the load regulation dependence. The output characteristic ...

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Output Voltage Positioning Table 9. Comparison between different load-line implementations. Layout-insensitive BOM Time-Constant Matching R Design (given OCP th Design (given (given R and 10.3 Offset (Optional) Positive offset ...

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L6701 10.5 Maximum Duty Cycle limitation To provide proper time for current-reading in order to equalize the current carried by each phase, the device implements a duty-cycle limitation. This limitation is not fixed but it is linearly variable with the ...

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Dynamic VID Transitions 11 Dynamic VID Transitions L6701 is able to manage Dynamic VID Code changes in all its operative modes (VR10, K8 and also VR9) so allowing Output Voltage modification during normal device operation. PGOOD (when applicable), OVP ...

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L6701 If the new VID code is more than 1 LSB different from the previous, the device will execute the Caution: transition stepping the reference with the DVID-clock frequency F reached: for this reason it is recommended to carefully control ...

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Soft Start 12 Soft Start L6701 implements a soft-start to smoothly charge the output filter avoiding high in-rush currents to be required to the input power supply. The device increases the reference from zero up to the programmed value ...

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L6701 13 Output voltage Monitor and Protections L6701 monitors through pin VSEN the regulated voltage in order to manage the OVP, UVP and PGOOD (when applicable) conditions. Protections are active also during soft-start (See Section 12 for details) while are ...

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Output voltage Monitor and Protections Figure 13. Output Voltage Protections and typical principle connections ( Preliminary OVP FBR/DACSEL Monitor UVLO VCC UVLO OVP 13.3 Over Voltage Once VCC crosses the turn-ON threshold and the device ...

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L6701 Figure 14. Feedback Disconnection PHASE1 PHASE2 PHASE3 CS_DROOP+ 13.5 PGOOD (Only for VR9 and K8 Modes open-drain signal set free after the soft-start sequence has finished pulled low ...

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Output voltage Monitor and Protections inductor current, the ripple entity, when not negligible, impacts on the real OC threshold value and must be considered. The device detects an Over Current condition for each phase when the current information I ...

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L6701 The trans-conductance resistor R bottom of the inductor current ripple and also considering the additional current delivered during the quasi-constant-current behavior as previously described in the worst case conditions. Moreover, when designing D-VID compatible systems, the additional current due ...

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Oscillator 14 Oscillator The internal oscillator generates the triangular waveform for the PWM charging and discharging with a constant current an internal capacitor. The switching frequency for each channel internally fixed at 100kHz so that the ...

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L6701 15 System Control Loop Compensation The control loop is composed by the Current Sharing control loop (See Average Current Mode control loop. Each loop gives, with a proper gain, the correction to the PWM in order to minimize the ...

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System Control Loop Compensation ⋅ PWM = -- - ------------------ - ∆V 5 OSC amplitude and has a typical value of 3V. Removing the dependence from the Error Amplifier gain, so assuming this gain high enough, ...

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L6701 15.1 Compensation Network Guidelines The Compensation Network design assures to having system response according to the cross- over frequency selected and to the output filter considered anyway possible to further fine- tune the compensation network modifying the ...

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Layout Guidelines 16 Layout Guidelines Since the device manages control functions and high-current drivers, layout is one of the most important things to consider when designing such high current applications. A good layout solution can generate a benefit in ...

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L6701 16.2 Small Signal Components and Connections These are small signal components and connections to critical nodes of the application as well as bypass capacitors for the device supply (See and Bootstrap capacitor) close to the device and refer sensible ...

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Layout Guidelines 16.3 Embedding L6701-based VRs When embedding the VR into the application, additional care must be taken since the whole switching DC/DC regulator and the most common systems in which it has to work are ...

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L6701 17 Package Mechanical Data In order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a Lead-free second level interconnect . The category of second Level Interconnect is marked on the package and on ...

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Package Mechanical Data PowerSSO-36 Mechanical Data Dim. Min. A 2. 0.18 c 0.23 (1) 10.10 D (2) 7 10. 0. ...

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L6701 18 Revision history Date Revision 13-Dec-2005 Description of Changes 1 First draft 18 Revision history 43/44 ...

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... No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics ...