MAX1544ETL+ Maxim Integrated Products, MAX1544ETL+ Datasheet - Page 14

IC QUICK-PWM DUAL-PHASE 40-TQFN

MAX1544ETL+

Manufacturer Part Number
MAX1544ETL+
Description
IC QUICK-PWM DUAL-PHASE 40-TQFN
Manufacturer
Maxim Integrated Products
Series
Quick-PWM™r
Datasheet

Specifications of MAX1544ETL+

Applications
Controller, AMD Hammer
Voltage - Input
2 ~ 28 V
Number Of Outputs
1
Voltage - Output
0.68 ~ 1.55 V
Operating Temperature
-40°C ~ 100°C
Mounting Type
Surface Mount
Package / Case
40-TQFN Exposed Pad
Output Voltage
0.675 V to 1.55 V
Output Current
40 A
Input Voltage
4 V to 28 V
Mounting Style
SMD/SMT
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Dual-Phase, Quick-PWM Controller for
AMD Hammer CPU Core Power Supplies
14
______________________________________________________________________________________
PIN
4, 5
10
11
12
13
1
2
3
6
7
8
9
NAME
S0, S1
SHDN
GNDS
TIME
GND
TON
CCV
SUS
OFS
ILIM
REF
V
CC
Slew-Rate Adjustment Pin. Connect a resistor from TIME to GND to set the internal slew-rate clock. A
150kΩ to 15kΩ resistor sets the clock from 100kHz to 1MHz, f
On-Time Selection Control Input. This four-level input sets the K-factor value used to determine the
DH_ on-time (see the On-Time One-Shot (T
200kHz, V
Suspend Input. SUS is a three-level logic input. When the controller detects on-transition on SUS, the
controller slews the output voltage to the new voltage level determined by SUS, S0–S1, and D0–D4.
The controller blanks VROK during the transition and another 24 R
DAC code is reached. Connect SUS as follows to select which multiplexer sets the nominal output
voltage:
3.3V or V
REF = Suspend mode; S0–S1 high-range suspend code (Table 5)
GND = Normal operation; D0–D4 VID DAC code (Table 4)
Suspend-Mode Voltage Select Inputs. S0–S1 are four-level digital inputs that select the suspend
mode VID code (Table 5) for the suspend mode multiplexer inputs. If SUS is high, the suspend mode
VID code is delivered to the DAC (see the Internal Multiplexers section), overriding any other voltage
setting (Figure 3).
S hutd ow n C ontr ol Inp ut. Thi s i np ut cannot w i thstand the b atter y vol tag e. C onnect to V
op er ati on. C onnect to g r ound to p ut the IC i nto i ts 1µA ( typ ) shutd ow n state. D ur i ng the tr ansi ti on fr om
nor m al op er ati on to shutd ow n, the outp ut vol tag e r am p s d ow n at 4 ti m es the outp ut- vol tag e sl ew r ate
p r og r am m ed b y the TIM E p i n. In shutd ow n m od e, D LM and D LS ar e for ced to V
g r ound . For ci ng SH DN to 12V ~ 15V d i sab l es b oth over vol tag e p r otecti on and und er vol tag e p r otecti on
ci r cui ts, d i sab l es over l ap op er ati on, and cl ear s the faul t l atch. D o not connect SH DN to > 15V .
Voltage-Divider Input for Offset Control. For 0 < V
subtracted from the output. For 1.2V < V
is added to the output. Voltages in the range of 0.8V < V
disables the offset amplifier during suspend mode (SUS = REF or high).
2V Reference Output. Bypass to GND with 0.22µF or greater ceramic capacitor. The reference can
source 100µA for external loads. Loading REF degrades output voltage accuracy according to the
REF load regulation error.
Current-Limit Adjustment. The current-limit threshold defaults to 30mV if ILIM is tied to V
adjustable mode, the current-limit threshold voltage is precisely 1/20 the voltage seen at ILIM over a
0.2V to 1.5V range. The logic threshold for switchover to the 30mV default value is approximately V
- 1V.
Analog Supply Voltage Input for PWM Core. Connect V
with a series 10Ω resistor. Bypass to GND with a 1µF or greater ceramic capacitor, as close to the IC
as possible.
Analog Ground. Connect the MAX1544’s exposed pad to analog ground.
Voltage Integrator Capacitor Connection. Connect a 47pF to 1000pF (47pF typ) capacitor from CCV
to analog ground (GND) to set the integration time constant.
Ground Remote-Sense Input. Connect GNDS directly to the CPU ground-sense pin. GNDS internally
connects to an amplifier that adjusts the output voltage, compensating for voltage drops from the
regulator ground to the load ground.
CC
CC
(high) = Suspend mode; S0–S1 low-range suspend code (Table 5)
= 100kHz
OFS
ON
< 2V, 0.125 times the difference between REF and OFS
FUNCTION
) section): GND = 550kHz, REF = 300kHz, OPEN =
OFS
< 0.8V, 0.125 times the voltage at OFS is
CC
OFS
to the system supply voltage (4.5V to 5.5V)
< 1.2V are undefined. The controller
SLEW
TIME
= 500kHz × 30kΩ/R
clock cycles after the new
Pin Description
D D
to cl am p the outp ut to
C C
for nor m al
TIME
CC
. In
.
CC

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