SE97BTP,547 NXP Semiconductors, SE97BTP,547 Datasheet - Page 8

• Manufacturer Part Number: SE97BTP,547
• Description: IC TEMP SENSOR DIMM 8HWSON
• Manufacturer: NXP Semiconductors

Specifications of SE97BTP,547

• Package / Case: 8-WSON (Exposed Pad), 8-HWSON
• Function: Temp Monitoring System (Sensor)
• Topology: ADC (Sigma Delta), Comparator, Register Bank
• Sensor Type: Internal
• Sensing Temperature: -40°C ~ 125°C
• Output Type: I²C™/SMBus™
• Output Alarm: Yes
• Output Fan: Yes
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Temperature Threshold: + 150 C
• Full Temp Accuracy: 2 C
• Digital Output - Bus Interface: I2C
• Digital Output - Number Of Bits: 11 bit
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 3 V
• Description/function: Temperature Sensor
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-5055-2

NXP Semiconductors
Table 4.
[1]
SE97B_1
Product data sheet
Figure
note
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Fig 4.
Between T
is ignored.
EVENT in ‘Critical Temp only’ mode
Refer to
EVENT output condition
EVENT output boundary
conditions
T
T
T
T
T
T
Table note [1]
EVENT output condition
amb
amb
amb
amb
amb
amb
EVENT in Comparator mode
amb
EVENT in Interrupt mode
≥ T
< T
> T
≤ T
≥ T
< T
Upper Boundary Alarm
Lower Boundary Alarm
≥ T
software interrupt clear
Table 4
trip(l)
trip(u)
th(crit)
trip(l)
trip(u)
th(crit)
th(crit)
temperature (°C)
− T
− T
− T
for figure note information.
and T
hys
hys
hys
critical
amb
< T
th(crit)
T
(1)
amb
Comparator
− T
mode
hys
H
H
L
L
L
L
the EVENT output is in Comparator mode and bit 0 of CONFIG (EVENT output mode)
Rev. 01 — 27 January 2010
T
trip(l)
EVENT output
− T
Interrupt
hys
DDR memory module temp sensor with integrated SPD
mode
H
L
L
L
L
L
(2)
T
trip(u)
− T
(1) (3)
Critical Temp
hys
only mode
H
H
H
H
H
L
(4)
(3)(5) (7)
Temperature Register Status bits
Critical
Above
Bit 15
Trip
0
0
0
0
1
0
(6) (4)
T
th(crit)
002aae763
Window
Above
Alarm
Bit 14
T
(2)
trip(u)
− T
0
0
1
0
1
1
© NXP B.V. 2010. All rights reserved.
hys
T
trip(l)
− T
SE97B
time
hys
− T
Window
hys
Below
Alarm
Bit 13
0
1
0
0
0
0
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